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MC74LVXT4066DR2 数据表(PDF) 1 Page - ON Semiconductor

部件名 MC74LVXT4066DR2
功能描述  Quad Analog Switch/Multiplexer/Demultiplexer High?뭁erformance Silicon?묰ate CMOS
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制造商  ONSEMI [ON Semiconductor]
网页  http://www.onsemi.com
标志 ONSEMI - ON Semiconductor

MC74LVXT4066DR2 数据表(HTML) 1 Page - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2005
March, 2005 − Rev. 2
1
Publication Order Number:
MC74LVXT4066/D
MC74LVXT4066
Quad Analog Switch/
Multiplexer/Demultiplexer
High−Performance Silicon−Gate CMOS
The MC74LVXT4066 utilizes silicon−gate CMOS technology to
achieve fast propagation delays, low ON resistances, and low
OFF−channel leakage current. This bilateral switch/multiplexer/
demultiplexer controls analog and digital voltages that may vary
across the full power−supply range (from VCC to GND).
The LVXT4066 is identical in pinout to the metal−gate CMOS
MC14066 and the high−speed CMOS HC4066A. Each device has four
independent switches. The device has been designed so that the ON
resistances (RON) are much more linear over input voltage than RON
of metal−gate CMOS analog switches.
The ON/OFF control inputs are compatible with standard LSTTL
outputs. The input protection circuitry on this device allows
overvoltage tolerance on the ON/OFF control inputs, allowing the
device to be used as a logic−level translator from 3.0 V CMOS logic to
5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS Logic
while operating at the higher−voltage power supply.
The MC74LVXT4066 input structure provides protection when
voltages up to 7.0 V are applied, regardless of the supply voltage. This
allows the MC74LVXT4066 to be used to interface 5.0 V circuits to
3.0 V circuits.
Features
Fast Switching and Propagation Speeds
High ON/OFF Output Voltage Ratio
Low Crosstalk Between Switches
Diode Protection on All Inputs/Outputs
Wide Power−Supply Voltage Range (V
CC − GND) = 2.0 to 6.0 V
Analog Input Voltage Range (V
CC − GND) = 2.0 to 6.0 V
Improved Linearity and Lower ON Resistance over Input Voltage
than the MC14016 or MC14066
Low Noise
Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
MARKING
DIAGRAMS
A
= Assembly Location
WL or L
= Wafer Lot
Y
= Year
WW or W
= Work Week
TSSOP−14
DT SUFFIX
CASE 948G
14
1
SOEIAJ−14
M SUFFIX
CASE 965
SOIC−14
D SUFFIX
CASE 751A
14
1
1
14
74LVXT4066
ALYW
LVXT4066
AWLYWW
14
1
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
1
14
http://onsemi.com
LVXT
4066
ALYW
1
14


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