MC10EL52, MC100EL52

http://onsemi.com

2

Figure 1. Logic Diagram and Pinout Assignment

1

2

3

45

6

7

8

Q

D

Q

CLK

CLK

D

D

Table 1. TRUTH TABLE

D*

L

H

CLK*

Z

Z

Q

L

H

Z = LOW to HIGH Transition

D, D

ECL Data Input

CLK, CLK

ECL Clock Input

Q, Q

ECL Data Output

Positive Supply

Negative Supply

Table 2. PIN DESCRIPTION

PIN

FUNCTION

* Pin will default low when left open.

EP

Exposed pad must be connected

to a sufficient thermal conduit.

Electrically connect to the most

negative supply or leave floating

open.

Table 3. MAXIMUM RATINGS

Symbol

Parameter

Condition 1

Condition 2

Rating

Unit

PECL Mode Power Supply

8

V

NECL Mode Power Supply

−8

V

PECL Mode Input Voltage

NECL Mode Input Voltage

6

−6

V

V

Output Current

Continuous

Surge

50

100

mA

mA

Operating Temperature Range

−40 to +85

°C

Storage Temperature Range

−65 to +150

°C

Thermal Resistance (Junction−to−Ambient)

0 lfpm

500 lfpm

8 SOIC

8 SOIC

190

130

°C/W

°C/W

Thermal Resistance (Junction−to−Case)

Standard Board

8 SOIC

41 to 44

°C/W

Thermal Resistance (Junction−to−Ambient)

0 lfpm

500 lfpm

8 TSSOP

8 TSSOP

185

140

°C/W

°C/W

Thermal Resistance (Junction−to−Case)

Standard Board

8 TSSOP

41 to 44 ± 5%

°C/W

Wave Solder

Pb

Pb−Free

<2 to 3 sec @ 248°C

<2 to 3 sec @ 260°C

265

265

°C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.