MC100EL34D datasheet(5/8 Pages) ONSEMI

部件名	MC100EL34D

功能描述	5V ECL 첨2, 첨4, 첨8 Clock Generation Chip

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制造商	ONSEMI [ON Semiconductor]

网页	http://www.onsemi.com

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MC10EL34, MC100EL34

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Table 8. 100EL SERIES NECL DC CHARACTERISTICS VCC = 0 V; VEE = −5.0 V (Note 11)

Symbol

Characteristic

−40°C

25°C

85°C

Unit

Min

Typ

Max

Min

Typ

Max

Min

Typ

Max

IEE

Power Supply Current

39

42

mA

VOH

Output HIGH Voltage (Note 12)

−1085

−1005

−880

−1025

−955

−880

−1025

−955

−880

mV

VOL

Output LOW Voltage (Note 12)

−1830

−1695

−1555

−1810

−1705

−1620

−1810

−1705 −1620

mV

VIH

Input HIGH Voltage (Single−Ended) −1165

−880

−1165

−880

−1165

−880

mV

VIL

Input LOW Voltage (Single−Ended)

−1810

−1475

−1810

−1475

−1810

−1475

mV

VBB

Output Voltage Reference

−1.38

−1.26

−1.38

−1.26

−1.38

−1.26

V

VIHCMR

Input HIGH Voltage Common Mode

Range (Differential Configuration)

(Note 13)

−2.8

−0.4

−2.8

−0.4

−2.8

−0.4

V

IIH

Input HIGH Current

150

mA

IIL

Input LOW Current

0.5

mA

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit

values are applied individually under normal operating conditions and not valid simultaneously.

11. Input and output parameters vary 1:1 with VCC. VEE can vary +0.8 V / −0.5 V.

12.Outputs are terminated through a 50 W resistor to VCC − 2.0 V.

13. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input

signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1 V.

Table 9. AC CHARACTERISTICS VCC = 5.0 V; VEE = 0.0 V or VCC = 0.0 V; VEE = −5.0 V (Note 14)

Symbol

Characteristic

−40°C

25°C

85°C

Unit

Min

Typ

Max

Min

Typ

Max

Min

Typ

Max

fmax

Maximum Toggle Frequency

1.1

GHz

tPLH

tPHL

Propagation

CLK to Q0

Delay to

CLK to Q1,2

Output

MR to Q

960

900

750

1200

1140

1060

960

900

750

1200

1140

1060

970

910

790

1210

1150

1090

ps

tSKEW

Within-Device Skew (Note 15)

100

ps

tJITTER

Cycle−to−Cycle Jitter

1.0

ps

tS

Setup Time EN

400

ps

tH

Hold Time EN

250

ps

tRR

Set/Reset Recovery

400

200

400

200

400

200

ps

VPP

Input Swing (Note 16)

150

1000

150

1000

150

1000

mV

tr

tf

Output Rise/Fall Times Q

(20% − 80%)

225

475

225

475

225

475

ps

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit

values are applied individually under normal operating conditions and not valid simultaneously.

14.10 Series: VEE can vary +0.06 V / −0.5 V.

100 Series: VEE can vary +0.8 V / −0.5 V.

15.Within-device skew is defined as identical transitions on similar paths through a device.

16.VPPmin is minimum input swing for which AC parameters guaranteed. The device has a DC gain of ≈40.

类似零件编号 - MC100EL34D

制造商	部件名	数据表	功能描述
ON Semiconductor	MC100EL34D	94Kb / 3P	첨2,첨4,첨8 Clock Generation Chip 1996 REV 2
	MC100EL34D	69Kb / 8P	5V ECL 첨2, 첨4, 첨8 Clock Generation Chip October, 2000 ??Rev. 3
	MC100EL34DG	173Kb / 9P	Clock Generation Chip July, 2016 ??Rev. 11
	MC100EL34DR2	94Kb / 3P	첨2,첨4,첨8 Clock Generation Chip 1996 REV 2
	MC100EL34DR2	69Kb / 8P	5V ECL 첨2, 첨4, 첨8 Clock Generation Chip October, 2000 ??Rev. 3

More results

类似说明 - MC100EL34D

制造商	部件名	数据表	功能描述
ON Semiconductor	MC100EL34	69Kb / 8P	5V ECL 첨2, 첨4, 첨8 Clock Generation Chip October, 2000 ??Rev. 3
	MC100LVEL34	145Kb / 10P	3.3V ECL 첨2, 첨4, 첨8 Clock Generation Chip November, 2006 ??Rev. 2
	MC100LVEL34	145Kb / 10P	3.3V ECL 첨2, 첨4, 첨8 Clock Generation Chip November, 2006 ??Rev. 2
Micrel Semiconductor	SY10EL34	57Kb / 4P	5V/3.3V 첨2, 첨4, 첨8 CLOCK GENERATION CHIP
Microchip Technology	SY100EL34	752Kb / 14P	5V/3.3V 첨2, 첨4, 첨8 Clock Generation Chip 02/28/20
Micrel Semiconductor	SY10EL34	61Kb / 5P	5V/3.3V 첨2, 첨4, 첨8 CLOCK GENERATION CHIP
Micrel Semiconductor	SY10EL34	176Kb / 7P	5V/3.3V 첨2, 첨4, 첨8 Clock Generation Chip
ON Semiconductor	MC10EL34	94Kb / 3P	첨2,첨4,첨8 Clock Generation Chip 1996 REV 2
	MC100LVEP34	150Kb / 12P	2.5V / 3.3V ECL 첨2, 첨4, 첨8 Clock Generation Chip November, 2006 ??Rev. 9
	MC100EL38	122Kb / 7P	5V ECL 첨2, 첨4/6 Clock Generation Chip October, 2006 ??Rev. 7