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MC33066DW 数据表(PDF) 8 Page - ON Semiconductor

部件名 MC33066DW
功能描述  High Performance High Performance
Download  11 Pages
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制造商  ONSEMI [ON Semiconductor]
网页  http://www.onsemi.com
标志 ONSEMI - ON Semiconductor

MC33066DW 数据表(HTML) 8 Page - ON Semiconductor

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MC34066, MC33066
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Errors in the threshold voltage and propagation delays
through the output drivers will affect the One−Shot period.
To guarantee accuracy, the output pulse of the control ship
is trimmed to within 5% of 1.5 μs with nominal values of RT
and CT.
The outputs of the Oscillator and One−Shot comparators
are OR’d together to produce the pulse ton, which drives the
Flip−Flop and output drivers. The output pulse ton is
initiated by the Oscillator, but either the oscillator
comparator or the One−Shot comparator can terminate the
pulse. When the oscillator discharge time exceeds the
one−shot period, the complete one−shot period is delivered
to the output section. If the oscillator discharge time is less
than the one−shot period, then the oscillator comparator
terminates the pulse prematurely and retriggers the
One−Shot. The waveforms on the left side of Figure 4
correspond to nonretriggered operation with constant
on−time and variable off−times. The right side of Figure 4
represents retriggered operation with variable on−time and
constant off−time.
Error Amplifier
A fully accessible high performance Error Amplifier is
provided for feedback control of the power supply system.
The Error Amplifier is internally compensated and features
dc open loop gain greater than 70 dB, input offset voltage
less than 10 mV and guaranteed minimum gain−bandwidth
product of 2.5 MHz. The input common mode range extends
from 1.5 V to 5.1 V, which includes the reference voltage.
For common mode voltages below 1.5 V, the Error
Amplifier output is forced low providing minimum
oscillator frequency.
The Oscillator Control Current pin is biased by the Error
Amplifier output voltage through RVFO as illustrated in
Figure 5. The output swing of the Error Amplifier is
restricted by a clamp circuit to limit the maximum oscillator
frequency. The clamp circuit limits the voltage across RVFO
to 2.5 V, thus limiting IOSC to 2.5 V/RVFO. Oscillator
accuracy is improved by trimming the clamp voltage to
obtain the fOSC(high) specification of 1.0 MHz with nominal
value external components.
Osc Control
Current
3
IOSC
RVFO
Error Amp
Output
6
7
Error Amp
Inverting Input 8
Error Amp
Output Clamp
2.5V
EA Clamp
Error
Amplifier
+
+
Error Amp
Noninverting Input
Figure 5. Error Amplifier and Clamp
Output Section
The pulse, ton, generated by the Oscillator and One−Shot
timer is gated to dual totem pole output drives by the
Steering Flip−Flop shown in Figure 6. Positive transitions of
ton toggle the Flip−Flop, which causes the pulses to alternate
between Output A and Output B. The flip−flop is reset by the
undervoltage lockout circuit during startup to guarantee that
the first pulse appears at Output A.
The totem−pole output drives are ideally suited for driving
power MOSFETs and are capable of sourcing and sinking
1.5 A. Rise and fall times are typically 20 ns when driving
a 1.0 nF load. High source/sink capability in a totem−pole
driver normally increases the risk of high cross conduction
current during output transitions. The MC34066 utilizes a
unique design that virtually eliminates cross conduction,
thus controlling the chip power dissipation at high
frequencies. A separate ground terminal is provided for the
output drivers to isolate the sensitive analog circuitry from
large transient currents.
Drivers
Steering
Flip−Flop
ton
T
Q
Q
R
14
12
13
Drive
Output A
Drive
Output B
Drive
Gnd
Fault
UVLO
VCC
Figure 6. Steering Flip−Flop and Output Drivers
PERIPHERAL SUPPORT FUNCTIONS
The MC34066 Resonant Controller provides a number of
support and protection functions including a precision
voltage reference, undervoltage lockout comparators,
soft−start circuitry, and a fault detector. These peripheral
circuits ensure that the power supply can be turned on and
off in a safe, controlled manner and that the system will be
quickly disabled when a fault condition occurs.
Undervoltage Lockout and Voltage Reference
Separate undervoltage lockout comparators sense the
input VCC voltage and the regulated reference voltage as
illustrated in Figure 7. When VCC increases to the upper
threshold voltage, the VCC UVLO comparator enables the
Reference Regulator. After the Vref output of the Reference
Regulator rises to 4.2 V, the Vref UVLO comparator switches
the UVLO signal to a logic zero state enabling the primary
control path. Reducing VCC to the lower threshold voltage
causes the VCC UVLO comparator to disable the Reference
Regulator. The Vref UVLO comparator then switches the
UVLO output to a logic one state disabling the controller.


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