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74ABT162823ADGGRE4 数据表(PDF) 2 Page - Texas Instruments |
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74ABT162823ADGGRE4 数据表(HTML) 2 Page - Texas Instruments |
2 / 10 page SN54ABT162823A, SN74ABT162823A 18BIT BUSINTERFACE FLIPFLOPS WITH 3STATE OUTPUTS SCBS666B − JULY 1996 − REVISED JUNE 2004 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 description/ordering information (continued) A buffered output-enable (OE) input places the nine outputs in either a normal logic state (high or low level) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The outputs, which are designed to source or sink up to 12 mA, include equivalent 25- Ω series resistors to reduce overshoot and undershoot. These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict. To ensure the high-impedance state during power up or power down, OE shall be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. FUNCTION TABLE (each 9-bit flip-flop) INPUTS OUTPUT OE CLR CLKEN CLK D OUTPUT Q L L X X X L L HL ↑ HH L HL ↑ LL L HL L X Q0 L HH X X Q0 H X X X X Z |
类似零件编号 - 74ABT162823ADGGRE4 |
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类似说明 - 74ABT162823ADGGRE4 |
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