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MAX3000A_06 Datasheet(数据表) 10 Page - Altera Corporation |
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MAX3000A Datasheet(HTML) 10 Page - Altera Corporation |
10 page ![]() 10 Altera Corporation MAX 3000A Programmable Logic Device Family Data Sheet Figure 4. MAX 3000A Parallel Expanders Unused product terms in a macrocell can be allocated to a neighboring macrocell. Programmable Interconnect Array Logic is routed between LABs on the PIA. This global bus is a programmable path that connects any signal source to any destination on the device. All MAX 3000A dedicated inputs, I/O pins, and macrocell outputs feed the PIA, which makes the signals available throughout the entire device. Only the signals required by each LAB are actually routed from the PIA into the LAB. Figure 5 shows how the PIA signals are routed into the LAB. An EEPROM cell controls one input to a two-input AND gate, which selects a PIA signal to drive into the LAB. Preset Clock Clear Product- er Select Matrix Preset Clock Clear Product- Ter T T m Select Matrix Macrocell Product- Term Logic From Previous Macrocell To Next Macrocell Macrocell Product- Term Logic 36 Signals from PIA 16 Shared Expanders |