Summary description

M24512-W, M24512-R, M24256-BW, M24256-BR

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Summary description

electrically erasable programmable memories (EEPROM). They are organized as 64 Kb × 8

bits and 32 Kb × 8 bits, respectively.

The devices carry a built-in 4-bit Device Type Identifier code (1010) in accordance with the

by the serial clock. Read and Write operations are initiated by a Start condition, generated

by the bus master. The Start condition is followed by a Device Select Code and Read/Write

bit (RW) (as described in Table 2), terminated by an acknowledge bit.

time, following the bus master’s 8-bit transmission. When data is read by the bus master, the

bus master acknowledges the receipt of the data byte in the same way. Data transfers are

terminated by a Stop condition after an Ack for Write, and after a NoAck for Read.

In order to meet environmental requirements, ST offers these devices in ECOPACK®

packages.

ECOPACK® packages are Lead-free and RoHS compliant.

ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.

Figure 1.

Logic diagram

Table 1.

Signal names

E0, E1, E2

Chip Enable

SDA

Serial Data

SCL

Serial Clock

WC

Write Control

Supply Voltage

Ground

AI02275c

SDA

VCC

M24512-W

M24512-R

M24256-BW

M24256-BR

WC

SCL

VSS

3

E0-E2