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74VHC273 数据表(PDF) 4 Page - Fairchild Semiconductor |
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74VHC273 数据表(HTML) 4 Page - Fairchild Semiconductor |
4 / 10 page www.fairchildsemi.com 4 AC Electrical Characteristics Note 4: Parameter guaranteed by design tOSLH |tPLHmax tPLHmin|; tOSHL |tPHLmax tPHLmin|. Note 5: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained from the equation: ICC (opr.) CPD * VCC * fIN ICC/8 (per F/F). The total CPD when n pieces of the Flip-Flop operates can be calculated by the equation: CPD (total) 22 9n. AC Operating Requirements Note 6: VCC is 3.3 r 0.3V or 5.0 r 0.5V Symbol Parameter VCC TA 25qCTA 40qC to 85qC Units Conditions (V) Min Typ Max Min Max fMAX Maximum Clock 3.3 r 0.3 75 120 65 MHz CL 15 pF Frequency 50 75 45 CL 50 pF 5.0 r 0.5 120 165 100 MHz CL 15 pF 80 110 70 CL 50 pF tPLH Propagation Delay 3.3 r 0.3 8.7 13.6 1.0 16.0 ns CL 15 pF tPHL Time (CK - Q) 11.2 17.1 1.0 19.5 CL 50 pF 5.0 r 0.5 5.8 9.0 1.0 10.5 ns CL 15 pF 7.3 11.0 1.0 12.5 CL 50 pF tPHL Propagation Delay 3.3 r 0.3 8.9 13.6 1.0 16.0 ns CL 15 pF Time (MR - Q) 11.4 17.1 1.0 19.5 CL 50 pF 5.0 r 0.5 5.2 8.5 1.0 10.0 ns CL 15 pF 6.7 10.5 1.0 12.0 CL 50 pF tOSLH Output to 3.3 r 0.3 1.5 1.5 ns (Note 4) CL 50 pF tOSHL Output Skew 5.0 r 0.5 1.0 1.0 CL 50 pF CIN Input Capacitance 4.0 10.0 10.0 pF VCC Open CPD Power Dissipation 31 pF (Note 5) Capacitance Symbol Parameter VCC (V) (Note 6) TA 25qCTA 40qC to 85qC Units Typ Guaranteed Minimum tW(L) Minimum Pulse Width (CK) 3.3 5.5 6.5 ns tW(H) 5.0 5.0 5.0 tW(L) Minimum Pulse Width (MR) 3.3 5.0 6.0 ns 5.0 5.0 5.0 tS Minimum Setup Time 3.3 5.5 6.5 ns 5.0 4.5 4.5 tH Minimum Hold Time 3.3 1.0 1.0 ns 5.0 1.0 1.0 tREC Minimum Removal Time (MR) 3.3 2.5 2.5 ns 5.0 2.0 2.0 |
类似零件编号 - 74VHC273 |
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类似说明 - 74VHC273 |
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