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SN74GTL16622A 数据表(PDF) 6 Page - Texas Instruments |
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SN74GTL16622A 数据表(HTML) 6 Page - Texas Instruments |
6 / 11 page www.ti.com Timing Requirements Switching Characteristics SN74GTL16622A 18-BIT LVTTL-TO-GTL/GTL+ BUS TRANSCEIVER SCBS673F – AUGUST 1996 – REVISED APRIL 2005 over recommended ranges of supply voltage and operating free-air temperature for GTL (unless otherwise noted) MIN MAX UNIT fclock Clock frequency 200 MHz tw Pulse duration, CLK high or low 2.5 ns Data before CLK ↑ 2.1 tsu Setup time ns CE before CLK ↑ 3.3 Data after CLK ↑ 0.3 th Hold time ns CE after CLK ↑ 0 over recommended ranges of supply voltage and operating free-air temperature for GTL (see Figure 1) FROM TO PARAMETER MIN TYP(1) MAX UNIT (INPUT) (OUTPUT) fmax 200 MHz tPLH 2.5 5.5 CLKAB B ns tPHL 2.2 5.5 tdis 1.7 4.8 OEAB B ns ten 2.2 5.2 Slew rate Both transitions (B port) 0.5 V/ns tr Transition time, B outputs (0.6 V to 1 V) 0.6 2.2 ns tf Transition time, B outputs (1 V to 0.6 V) 0.4 1.5 ns tPLH 2.1 5.3 CLKBA A ns tPHL 2.1 5 ten 1.7 5 OEBA A ns tdis 2.3 5.5 (1) All typical values are at VCC = 3.3 V, TA = 25°C. 6 |
类似零件编号 - SN74GTL16622A |
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类似说明 - SN74GTL16622A |
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