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APEX20K Datasheet(数据表) 4 Page - Altera Corporation |
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APEX20K Datasheet(HTML) 4 Page - Altera Corporation |
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4 page 
4 Altera Corporation APEX 20K Programmable Logic Device Family Data Sheet Windows-based PCs, Sun SPARCstations, and HP 9000 Series 700/800 workstations –Altera MegaCore® functions and Altera Megafunction Partners Program (AMPPSM) megafunctions – NativeLinkTM integration with popular synthesis, simulation, and timing analysis tools – Quartus II SignalTap® embedded logic analyzer simplifies in-system design evaluation by giving access to internal nodes during device operation – Supports popular revision-control software packages including PVCS, Revision Control System (RCS), and Source Code Control System (SCCS ) Table 4. APEX 20K QFP, BGA & PGA Package Options & I/O Count Notes (1), (2) Device 144-Pin TQFP 208-Pin PQFP RQFP 240-Pin PQFP RQFP 356-Pin BGA 652-Pin BGA 655-Pin PGA EP20K30E 92 125 EP20K60E 92 148 151 196 EP20K100 101 159 189 252 EP20K100E 92 151 183 246 EP20K160E 88 143 175 271 EP20K200 144 174 277 EP20K200E 136 168 271 376 EP20K300E 152 408 EP20K400 502 502 EP20K400E 488 EP20K600E 488 EP20K1000E 488 EP20K1500E 488 |
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