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APEX20K Datasheet(数据表) 2 Page - Altera Corporation

部件型号  APEX20K
说明  Programmable Logic Device Family
下载  117 Pages
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制造商  ALTERA [Altera Corporation]
网页  http://www.altera.com
标志 ALTERA - Altera Corporation

APEX20K Datasheet(HTML) 2 Page - Altera Corporation

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Altera Corporation
APEX 20K Programmable Logic Device Family Data Sheet
Note to Tables 1 and 2:
(1)
The embedded IEEE Std. 1149.1 Joint Test Action Group (JTAG) boundary-scan circuitry contributes up to
57,000 additional gates.
Additional
Features
Designed for low-power operation
1.8-V and 2.5-V supply voltage (see Table 3)
–MultiVoltTM I/O interface support to interface with 1.8-V, 2.5-V,
3.3-V, and 5.0-V devices (see Table 3)
ESB offering programmable power-saving mode
Note to Table 3:
(1)
APEX 20KE devices can be 5.0-V tolerant by using an external resistor.
Table 2. Additional APEX 20K Device Features
Note (1)
Feature
EP20K300E
EP20K400
EP20K400E
EP20K600E
EP20K1000E EP20K1500E
Maximum system
gates
728,000
1,052,000
1,052,000
1,537,000
1,772,000
2,392,000
Typical gates
300,000
400,000
400,000
600,000
1,000,000
1,500,000
LEs
11,520
16,640
16,640
24,320
38,400
51,840
ESBs
72
104
104
152
160
216
Maximum
RAM bits
147,456
212,992
212,992
311,296
327,680
442,368
Maximum
macrocells
1,152
1,664
1,664
2,432
2,560
3,456
Maximum user I/O
pins
408
502
488
588
708
808
Table 3. APEX 20K Supply Voltages
Feature
Device
EP20K100
EP20K200
EP20K400
EP20K30E
EP20K60E
EP20K100E
EP20K160E
EP20K200E
EP20K300E
EP20K400E
EP20K600E
EP20K1000E
EP20K1500E
Internal supply voltage (VCCINT)
2.5 V
1.8 V
MultiVolt I/O interface voltage levels (VCCIO) 2.5 V, 3.3 V, 5.0 V
1.8 V, 2.5 V, 3.3 V, 5.0 V (1)




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