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HY5PS1G421LM 数据表(PDF) 13 Page - Hynix Semiconductor |
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HY5PS1G421LM 数据表(HTML) 13 Page - Hynix Semiconductor |
13 / 79 page Rev. 0.2 / Oct. 2005 13 1HY5PS12421(L)M HY5PS12821(L)M 1. If OCD calibration is not used, EMRS OCD Default command (A9=A8= A7=1) followed by EMRS OCD Calibration Mode Exit command (A9=A8=A7=0) must be issued with other operating parameters of EMRS. 2. The DDR2 SDRAM is now ready for normal operation. *1) To guarantee ODT off, VREF must be valid and a low level must be applied to the ODT pin. *2) Sequence 5 and 6 may be performed between 8 and 9. 2.3.2 Programming the Mode and Extended Mode Registers For application flexibility, burst length, burst type, CAS latency, DLL reset function, write recovery time(tWR) are user defined variables and must be programmed with a Mode Register Set (MRS) command. Addition- ally, DLL disable function, driver impedance, additive CAS latency, ODT(On Die Termination), single-ended strobe, and OCD(off chip driver impedance adjustment) are also user defined variables and must be pro- grammed with an Extended Mode Register Set (EMRS) command. Contents of the Mode Register(MR) or Extended Mode Registers(EMR(#)) can be altered by re-executing the MRS and EMRS Commands. If the user chooses to modify only a subset of the MRS or EMRS variables, all variables must be redefined when the MRS or EMRS commands are issued. MRS, EMRS and Reset DLL do not affect array contents, which means reinitialization including those can be executed any time after power-up without affecting array contents. Initialization Sequence after Power Up /CK CK CKE Command PRE ALL PRE ALL EMRS MRS REF REF MRS EMRS EMRS ANY CMD DLL ENABLE DLL RESET OCD Default OCD CAL. MODE EXIT Follow OCD Flowchart 400ns tRFC tRFC tRP tRP tMRD tMRD tMRD tOIT min. 200 Cycle NOP ODT tCL tCH tIS |
类似零件编号 - HY5PS1G421LM |
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类似说明 - HY5PS1G421LM |
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