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CDB5016 数据表(PDF) 1 Page - Cirrus Logic |
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CDB5016 数据表(HTML) 1 Page - Cirrus Logic |
1 / 7 page Features •• Compatible with CS5012, CS5012A, CS5014, CS5016 •• PC/µP-Compatible Header Connection 16-Bit Parallel Data End-of-Conversion Output CS, RD, and A0 Control Inputs •• DIP-Switch Selectable: Unipolar/Bipolar Input Range Burst & Interleave Calibration Modes Continuous Conversion •• Adjustable Voltage Reference •• Serial Data and Clock BNC Connections •• Operation from Internally-Generated or Externally-Supplied Master Clock General Description The CDB5012/4/6 is an evaluation board that eases the laboratory characterization of any of the CS5012, CS5012A, CS5014 and CS5016 A/D converters. The board can be easily reconfigured to simulate any com- bination of sampling, master clock, calibration, and input range conditions. The converter’s parallel output data are available at a 40 pin strip header allowing easy interfacing to PC’s or microprocessor busses. Output data is also available in serial form at SCLK and SDATA coaxial BNC connec- tors. Evaluation can also be performed over a wide range of input spans using the on-board reference circuitry. Fur- thermore, the CDB5012, CDB5012A, CDB5014, CDB5016 features DIP-switch selectable unipolar/bipo- lar input ranges and the interleave calibration mode. Calibration can be initiated at any time by momentarily depressing a reset pushbutton. ORDERING INFORMATION: CDB5012, CDB5012A, CDB5014, CDB5016 MAR ’95 DS14DB11 1 Crystal Semiconductor Corporation P.O. Box 17847, Austin, TX 78760 (512) 445 7222 FAX: (512) 445 7581 Evaluation Board for CS5012, CS5012A, CS5014, CS5016 ADC’s Semiconductor Corporation CDB5012 CDB5012A CDB5014 CDB5016 D0 - D15 A0 RD EOC CS H E A D E R SCLK SDATA RESET AIN CLKIN HOLD GND -5V +5V VOLTAGE REFERENCE A/D Converter CS5012A CS5014 CS5016 CS5012 Copyright © Crystal Semiconductor Corporation 1995 (All Rights Reserved) |
类似零件编号 - CDB5016 |
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类似说明 - CDB5016 |
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