H4006 Datasheet(数据表) 4 Page - EM Microelectronic

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EMMICROELECTRONIC-MARINSA

H4006

General description

The transponder will be activated when

illuminated by a RF field of sufficient power and

at any frequency that is compatible with its

associated antenna and its internal power supply

circuit input characteristics. The chip will Power-

on-Reset itself when powered by this incoming

energy that exceeds its reset threshold. After

resetting itself the chip will start to transmit its

memory contents as a stream of Miller code. The

memory contents is transmitted by modifying the

antenna matching impedance at its internal

clock rate, thereby causing varying amounts of

RF energy to be reflected from the antenna. This

impedance variation will be achieved by

connecting a modulating device across the

antenna terminals. When switched on the

modulating device will present a low impedance

to the antenna. This will cause a change in the

matching of the antenna and therefore in the

amount of RF energy reflected by the transponder

to the reader. This reflected signal combines with

the transmitted signal in the receiver to yield an

amplitude modulated signal representative of the

IC memory contents. The “ON” impedance of the

modulating device needs to be comparable to

about 100 Ohms to affect the matching of the

antenna and therefore its reflectivity.

The RF signal received from the transponder

antenna will serve several purposes :

• power the chip

• provide a global reset to the chip through its

POR (Power-On-Reset) function

• provide a carrier for the data transmission

• provide the input of the internal clock

generation circuit (frequency division)

Functional description

Output Sequence

Transmission from the transponder will be

accomplished through variation of the antenna

load impedance by switching the modulating

device ON and OFF.

Output sequence is composed of cycles which

are repeated. Each cycle is composed of 82 bits

Standard Message Structure (STDMS) which is

Miller coded and a pause (LW) during which the

modulating device is OFF (see figure 6 for details

of Miller code).

The pause (LW) is 9bits length.

The 82 bit STDMS consists of 1 start bit, 64 data

bits, 16 CRC bits and 1 stop bit.

Start bit (1)

Data(64)

CRC

(16)

Stop bit

(1)

LW(9)

Table 4

Memory organisation

As already mentioned above the 82 bits are

stored in laser programmed ROM (LROM). The 82

bits of this LROM is partioned as

followed (see table 5):

Wafer Number

5 bits

Factory reserved

4 bits

IC name

10 bits

Customer ID

13 bits

Extended lot number

18 bits

IC position

14 bits

Cyclic redundancy check

16 bits

Start and stop bits

2 bits

First bit sent is bit 0.

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