数据搜索系统,热门电子元器件搜索 |
|
AD9510BCPZ-REEL7 数据表(PDF) 11 Page - Analog Devices |
|
AD9510BCPZ-REEL7 数据表(HTML) 11 Page - Analog Devices |
11 / 60 page AD9510 Rev. A | Page 11 of 60 Parameter Min Typ Max Unit Test Conditions/Comments @ 100 kHz Offset −154 dBc/Hz @ 1 MHz Offset −156 dBc/Hz >10 MHz Offset −158 dBc/Hz CLK1-TO-CMOS ADDITIVE PHASE NOISE Distribution Section only; does not include PLL or external VCO/VCXO CLK1 = 245.76 MHz, OUT = 245.76 MHz Divide Ratio = 1 @ 10 Hz Offset −110 dBc/Hz @ 100 Hz Offset −121 dBc/Hz @ 1 kHz Offset −130 dBc/Hz @ 10 kHz Offset −140 dBc/Hz @ 100 kHz Offset −145 dBc/Hz @ 1 MHz Offset −149 dBc/Hz >10 MHz Offset −156 dBc/Hz CLK1 = 245.76 MHz, OUT = 61.44 MHz Divide Ratio = 4 @ 10 Hz Offset −122 dBc/Hz @ 100 Hz Offset −132 dBc/Hz @ 1 kHz Offset −143 dBc/Hz @ 10 kHz Offset −152 dBc/Hz @ 100 kHz Offset −158 dBc/Hz @ 1 MHz Offset −160 dBc/Hz >10 MHz Offset −162 dBc/Hz CLK1 = 78.6432 MHz, OUT = 78.6432 MHz Divide Ratio = 1 @ 10 Hz Offset −122 dBc/Hz @ 100 Hz Offset −132 dBc/Hz @ 1 kHz Offset −140 dBc/Hz @ 10 kHz Offset −150 dBc/Hz @ 100 kHz Offset −155 dBc/Hz @ 1 MHz Offset −158 dBc/Hz >10 MHz Offset −160 dBc/Hz CLK1 = 78.6432 MHz, OUT = 39.3216 MHz Divide Ratio = 2 @ 10 Hz Offset −128 dBc/Hz @ 100 Hz Offset −136 dBc/Hz @ 1 kHz Offset −146 dBc/Hz @ 10 kHz Offset −155 dBc/Hz @ 100 kHz Offset −161 dBc/Hz >1 MHz Offset −162 dBc/Hz |
类似零件编号 - AD9510BCPZ-REEL7 |
|
类似说明 - AD9510BCPZ-REEL7 |
|
|
链接网址 |
隐私政策 |
ALLDATASHEETCN.COM |
ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |