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AD9381 数据表(PDF) 10 Page - Analog Devices

部件名 AD9381
功能描述  HDMI Display Interface
Download  44 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9381 数据表(HTML) 10 Page - Analog Devices

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AD9381
Rev. 0 | Page 10 of 44
TIMING
The output data clock signal is created so that its rising edge
always occurs between data transitions and can be used to latch
the output data externally.
Figure 3 shows the timing operation of the AD9381.
tPER
tDCYCLE
tSKEW
DATACK
DATA
HSOUT
Figure 3. Output Timing
VSYNC FILTER AND ODD/EVEN FIELDS
The VSYNC filter eliminates spurious VSYNCs, maintains a
consistent timing relationship between the VSYNC and HSYNC
output signals, and generates the odd/even field output.
The filter works by examining the placement of VSYNC
with respect to HSYNC and, if necessary, slightly shifting
it in time at the VSOUT output. The goal is to keep the
VSYNC and HSYNC leading edges from switching at the
same time, eliminating confusion as to when the first line
of a frame occurs. Enabling the VSYNC filter is done with
Register 0x21[5]. Use of the VSYNC filter is recommended for
all cases, including interlaced video, and is required when using
the HSYNC per VSYNC counter. Figure 4 and Figure 5
illustrate even/odd field determination in two situations.
FIELD 1
FIELD 0
SYNC SEPARATOR THRESHOLD
FIELD 1
FIELD 0
23
2
1
4
31
HSIN
VSIN
4
VSOUT
O/E FIELD
EVEN FIELD
QUADRANT
Figure 4.
FIELD 1
FIELD 0
SYNC SEPARATOR THRESHOLD
FIELD 1
FIELD 0
23
2
1
44
31
HSIN
VSIN
VSYOUT
O/E FIELD
ODD FIELD
QUADRANT
Figure 5. VSYNC Filter—Odd/Even
HDMI RECEIVER
The HDMI receiver section of the AD9381 allows the reception
of a digital video stream, which is backward compatible with
DVI and able to accommodate not only video of various for-
mats (RGB, YCrCb 4:4:4, 4:2:2), but also up to eight channels of
audio. Infoframes are transmitted carrying information about
the video format, audio clocks, and many other items necessary
for a monitor to use fully the information stream available.
The earlier digital visual interface (DVI) format was restricted
to an RGB 24-bit color space only. Embedded in this data
stream were HSYNCs, VSYNCs, and display enable (DE)
signals, but no audio information. The HDMI specification
allows transmission of all the DVI capabilities, but adds several
YCrCb formats that make the inclusion of a programmable
color space converter (CSC) a very desirable feature. With this,
the scaler following the AD9381 can specify that it always
wishes to receive a particular format—for instance, 4:2:2
YCrCb—regardless of the transmitted mode. If RGB is sent, the
CSC can easily convert that to 4:2:2 YCrCb while relieving the
scaler of this task.
In addition, the HDMI specification supports the transmission
of up to eight channels of S/PDIF or I2S audio. The audio
information is packetized and transmitted during the video
blanking periods along with specific information about the
clock frequency. Part of this audio information (audio
Infoframe) tells the user how many channels of audio are being
transmitted, where they should be placed, information
regarding the source (make, model), and other data.
DE GENERATOR
The AD9381 has an onboard generator for DE, for start of
active video (SAV) and for end of active video (EAV), all of
which is necessary for describing the complete data stream for a
BT656-compatible output. In addition to this particular output,
it is possible to generate the DE for cases in which a scaler is not
used. This signal alerts the following circuitry as to which are
displayable video pixels.


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