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DP83849IFVS 数据表(PDF) 83 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 DP83849IFVS
功能描述  PHYTER짰 DUAL Industrial Temperature with Fiber Support (FX) an Flexible Port Switching Dual Port 10/100 Mb/s Ethernet Physical Layer Transceiver
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

DP83849IFVS 数据表(HTML) 83 Page - National Semiconductor (TI)

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7.3.10 Link Quality Data Register (LQDR), Page 2
This register provides read/write control of thresholds for the 100Mb Link Quality Monitor function. The register also pro-
vides a mechanism for reading current adapted parameter values. Threshold values may not be written if the device is
powered-down
.
Table 52. Link Quality Data Register (LQDR), address 1Eh
Bit
Bit Name
Default
Description
15:14
RESERVED
0, RO
RESERVED: Writes ignored, read as 0.
13
SAMPLE_PARAM
0, RW
Sample DSP Parameter:
Setting this bit to a 1 enables reading of current parameter values
and initiates sampling of the parameter value. The parameter to be
read is selected by the LQ_PARAM_SEL bits.
12
WRITE_LQ_THR
0, RW
Write Link Quality Threshold:
Setting this bit will cause a write to the Threshold register selected
by LQ_PARAM_SEL and LQ_THR_SEL. The data written is con-
tained in LQ_THR_DATA. This bit will always read back as 0.
11:9
LQ_PARAM_SEL
0, RW
Link Quality Parameter Select:
This 3-bit field selects the Link Quality Parameter. This field is used
for sampling current parameter values as well as for reads/writes to
Threshold values. The following encodings are available:
000: DEQ_C1
001: DAGC
010: DBLW
011: Frequency Offset
100: Frequency Control
8
LQ_THR_SEL
0, RW
Link Quality Threshold Select:
This bit selects the Link Quality Threshold to be read or written. A
0 selects the Low threshold, while a 1 selects the high threshold.
When combined with the LQ_PARAM_SEL field, the following en-
codings are available {LQ_PARAM_SEL, LQ_THR_SEL}:
000,0: DEQ_C1 Low
000,1: DEQ_C1 High
001,0: DAGC Low
001,1: DAGC High
010,0: DBLW Low
010,1: DBLW High
011,0: Frequency Offset Low
011,1: Frequency Offset High
100,0: Frequency Control Low
100,1: Frequency Control High
7:0
LQ_THR_DATA
0, RW
Link Quality Threshold Data:
The operation of this field is dependent on the value of the
Sample_Param bit.
If Sample_Param = 0:
On a write, this value contains the data to be written to the selected
Link Quality Threshold register.
On a read, this value contains the current data in the selected Link
Quality Threshold register.
If Sample_Param = 1:
On a read, this value contains the sampled parameter value. This
value will remain unchanged until a new read sequence is started.


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