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FXL2TD245 Datasheet(数据表) 2 Page - Fairchild Semiconductor

部件型号  FXL2TD245
说明  Low Voltage Dual Supply 2-Bit Signal Translator with Configurable Voltage Supplies and Signal Levels 3-STATE Outputs and Independent
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制造商  FAIRCHILD [Fairchild Semiconductor]
网页  http://www.fairchildsemi.com
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FXL2TD245 Datasheet(HTML) 2 Page - Fairchild Semiconductor

 
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©2005 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FXL2TD245 Rev. 1.0.4
2
Functional Diagram
Connection Diagram
(Top View)
Pin Assignment
Pin Descriptions
Truth Table
H
= HIGH Voltage Level
L
= LOW Voltage Level
X
= Don't Care
Power-Up/Power-Down Sequencing
FXL translators offer an advantage in that either VCC
may be powered up first. This benefit derives from the
chip design. When either VCC is at 0 volts, outputs are in
a HIGH-Impedance state. The control inputs (T/Rn and
OE) are designed to track the VCCA supply. A pull-up
resistor tying OE to VCCA should be used to ensure that
bus contention, excessive currents, or oscillations do not
occur during power-up/power-down. The size of the pull-
up resistor is based upon the current-sinking capability
of the OE driver.
The recommended power-up sequence is the following:
1. Apply power to either VCC.
2. Apply power to the T/Rn inputs (Logic HIGH for A-to-B
operation; Logic LOW for B-to-A operation) and to the
respective data inputs (A Port or B Port). This may
occur at the same time as Step 1.
3. Apply power to other VCC.
4. Drive the OE input LOW to enable the device.
The recommended power-down sequence is the follow-
ing:
1. Drive OE input HIGH to disable the device.
2. Remove power from either VCC.
3. Remove power from other VCC.
Pin Number
Terminal Name
1VCCA
2A0
3A1
4
T/R0
5
GND
6
T/R1
7OE
8B1
9B0
10
VCCB
VCCA
A0
A1
T/R0
OE
T/R1
VCCB
B0
B1
9
8
7
6
2
10
1
VCCA
A0
A1
T/R0
B0
VCCB
GND
B1
OE
T/R1
5
3
4
Pin Names
Description
OE
Output Enable Input
T/Rn
Transmit/Receive Inputs
An
Side A Inputs or 3-STATE Outputs
Bn
Side B Inputs or 3-STATE Outputs
VCCA
Side A Power Supply
VCCB
Side B Power Supply
Inputs
Outputs
OE
T/R0 T/R1
LL
X
B0 Data to A0 Output
LH
X
A0 Data to B0 Output
LXL
B1 Data to A1 Output
LX
H
A1 Data to B1 Output
HX
X
3-STATE




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