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P75N02LD Datasheet(数据表) 1 Page - List of Unclassifed Manufacturers

部件型号  P75N02LD
说明  N-Channel Logic Level Enhancement Mode Field Effect Transistor
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制造商  ETC1 [List of Unclassifed Manufacturers]
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P75N02LD Datasheet(HTML) 1 Page - List of Unclassifed Manufacturers

   
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AUG-02-2001
N-Channel Logic Level Enhancement
Mode Field Effect Transistor
P75N02LD
TO-252 (D2PAK)
NIKO-SEM
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
LIMITS
UNITS
Gate-Source Voltage
VGS
±20
V
TC = 25 °C
75
Continuous Drain Current
TC = 100 °C
ID
50
Pulsed Drain Current
1
IDM
170
Avalanche Current
IAR
60
A
Avalanche Energy
L = 0.1mH
EAS
140
Repetitive Avalanche Energy
2
L = 0.05mH
EAR
5.6
mJ
TC = 25 °C
65
Power Dissipation
TC = 100 °C
PD
38
W
Operating Junction & Storage Temperature Range
Tj, Tstg
-55 to 150
Lead Temperature (
1/
16” from case for 10 sec.)
TL
275
°C
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
TYPICAL
MAXIMUM
UNITS
Junction-to-Case
RθJC
2.3
Junction-to-Ambient
RθJA
62.5
Case-to-Heatsink
RθCS
0.6
°C / W
1Pulse width limited by maximum junction temperature.
2Duty cycle ≤ 1%
ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted)
LIMITS
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX
UNIT
STATIC
Drain-Source Breakdown Voltage
V(BR)DSS
VGS = 0V, ID = 250µA
25
Gate Threshold Voltage
VGS(th)
VDS = VGS, ID = 250µA
1
1.5
3
V
Gate-Body Leakage
IGSS
VDS = 0V, VGS = ±20V
±250
nA
VDS = 20V, VGS = 0V
25
Zero Gate Voltage Drain Current
IDSS
VDS = 20V, VGS = 0V, TJ = 125 °C
250
µA
1. GATE
2. DRAIN
3. SOURCE
PRODUCT SUMMARY
V(BR)DSS
RDS(ON)
ID
25
5mΩ
75A
G
D
S




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