This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any

responsibility for use of circuits described. No patent licenses are implied.

Rev.00 /Apr. 2003

Hynix Semiconductor

HY62LF16206B-DT12C

128Kx16bit full CMOS SRAM

DESCRIPTION

The HY62LF16206B is a high speed, super low

power and 2Mbit full CMOS SRAM organized as

128K words by 16bits. The HY62LF16206B uses

high performance full CMOS process technology

and is designed for high speed and low power

circuit technology. It is particularly well-suited for

the high density low power system application.

This device has a data retention mode that

guarantees data to remain valid at a minimum

power supply voltage of 1.2V.

FEATURES

• Fully static operation and Tri-state output

• TTL compatible inputs and outputs

• Battery backup(L-part)

-. 1.2V(min) data retention

• Standard pin configuration

-. 48-TSOP1

Product

Voltage

Speed

Operation

Standby Current(uA)

Temperature

No.

(V)

(ns)

Current/Icc(mA)

D

(

°C)

HY62LF16206B

2.3~2.7

120

1

20

0~70

Notes :

1. Current value is max.

PIN CONNECTION

BLOCK DIAGRAM

48-TSOP1(Forward)

PIN CONNECTION

Pin Name

Pin Function

Pin Name

Pin Function

/CS1

Chip Select 1

I/O1~I/O16

Data Inputs / Outputs

CS2

Chip Select 2

A0~A16

Address Inputs

/WE

Write Enable

Vcc

Power(2.3V~2.7V)

/OE

Output Enable

Vss

Ground

/LB

Lower Byte Control(I/O1~I/O8)

NC

No Connection

/UB

Upper Byte Control(I/O9~I/O16)

MEMORY ARRAY

128K x 16

ROW

DECODER

I/O1

I/O16

A0

A16

CS2

/OE

/LB

/UB

/WE

/CS1

A15

A14

A13

A12

A11

A10

A9

A8

NC

NC

/WE

CS2

NC

/UB

/LB

NC

NC

A7

A6

A5

A4

A3

A2

A1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

A16

NC

VSS

IO16

IO8

IO15

IO7

IO14

IO6

IO13

IO5

VCC

IO12

IO4

IO11

IO3

IO10

IO2

IO9

IO1

/OE

VSS

/CS1

A0