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AD8202YCSURF 数据表(PDF) 11 Page - Analog Devices

部件名 AD8202YCSURF
功能描述  High Common-Mode Voltage, Single-Supply Difference Amplifier
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD8202YCSURF 数据表(HTML) 11 Page - Analog Devices

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AD8202
Rev. A | Page 11 of 12
40LOG (f2/f1)
f1
f2
f22/f1
FREQUENCY
A 1-POLE FILTER, CORNER f1, AND
A 2-POLE FILTER, CORNER f2, HAVE
THE SAME ATTENUATION –40LOG (f2/f1)
AT FREQUENCY f22/f1
20dB/DECADE
40dB/DECADE
Figure 21. Comparative Responses of 1-Pole and 2-Pole Low-Pass Filters
HIGH-LINE CURRENT SENSING WITH LPF AND
GAIN ADJUSTMENT
Figure 22 is another refinement of Figure 2, including gain
adjustment and low-pass filtering.
GND
NC
–IN
+IN
A1
+VS
A2
OUT
AD8202
5V
INDUCTIVE
LOAD
POWER
DEVICE
4-TERM
SHUNT
CLAMP
DIODE
BATTERY
14V
NC = NO CONNECT
COMMON
C
OUT
4V/AMP
5% CALIBRATION RANGE
fC = 0.796Hz µF
(0.22
µF FOR f
C = 3.6Hz)
VOS/IB
NULL
191k
20k
Figure 22. High-Line Current Sensor Interface;
Gain = ×40, Single-Pole, Low-Pass Filter
A power device that is either on or off controls the current in
the load. The average current is proportional to the duty cycle
of the input pulse and is sensed by a small value resistor. The
average differential voltage across the shunt is typically 100 mV,
although its peak value is higher by an amount that depends on
the inductance of the load and the control frequency. The
common-mode voltage, on the other hand, extends from
roughly 1 V above ground for the on condition to about 1.5 V
above the battery voltage in the off condition. The conduction
of the clamping diode regulates the common-mode potential
applied to the device. For example, a battery spike of 20 V may
result in an applied common-mode potential of 21.5 V to the
input of the devices.
To produce a full-scale output of 4 V, a gain ×40 is used, adjust-
able by ±5% to absorb the tolerance in the shunt. There is
sufficient headroom to allow 10% overrange (to 4.4 V). The
roughly triangular voltage across the sense resistor is averaged
by a 1-pole, low-pass filter, here set with a corner frequency of
3.6 Hz, which provides about 30 dB of attenuation at 100 Hz. A
higher rate of attenuation can be obtained using a 2-pole filter
with fC = 20 Hz, as shown in Figure 23. Although this circuit
uses two separate capacitors, the total capacitance is less than
half that needed for the 1-pole filter.
GND
NC
–IN
+IN
A1
+VS
A2
OUT
AD8202
5V
INDUCTIVE
LOAD
POWER
DEVICE
4-TERM
SHUNT
CLAMP
DIODE
BATTERY
14V
NC = NO CONNECT
COMMON
fC = 1Hz µF
(0.05
µF FOR f
C = 20Hz)
C
OUTPUT
127k
C
432k
50k
Figure 23. 2-Pole Low-Pass Filter
DRIVING CHARGE REDISTRIBUTION ADCS
When driving CMOS ADCs such as those embedded in popular
microcontrollers, the charge injection (ΔQ) can cause a
significant deflection in the output voltage of the AD8202.
Though generally of short duration, this deflection may persist
until after the sample period of the ADC has expired due to the
relatively high open-loop output impedance of the AD8202.
Including an R-C network in the output can significantly reduce
the effect. The capacitor helps to absorb the transient charge,
effectively lowering the high frequency output impedance of the
AD8202. For these applications, the output signal should be
taken from the midpoint of the RLAG − CLAG combination as
shown in Figure 24.
Since the perturbations from the analog-to-digital converter are
small, the output impedance of the AD8202 appears to be low. The
transient response, therefore, has a time constant governed by the
product of the two LAG components, CLAG × RLAG. For the values
shown in Figure 24, this time constant is programmed at approxi-
mately 10 µs. Therefore, if samples are taken at several tens of
microseconds or more, there is negligible charge stack-up.
+IN
–IN
10k
10k
AD8202
5V
R
LAG
1k
C
LAG
0.01
µF
MICROPROCESSOR
A/D
A2
2
4
6
5
Figure 24. Recommended Circuit for Driving CMOS A/D


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