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ISL9N316AD3ST Datasheet(数据表) 3 Page - Fairchild Semiconductor

部件型号  ISL9N316AD3ST
说明  N-Channel Logic Level PWM Optimized UltraFET Trench Power MOSFETs
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制造商  FAIRCHILD [Fairchild Semiconductor]
网页  http://www.fairchildsemi.com
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ISL9N316AD3ST Datasheet(HTML) 3 Page - Fairchild Semiconductor

 
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©2002 Fairchild Semiconductor Corporation
Rev. B, February 2002
Typical Characteristic
Figure 1. Normalized Power Dissipation vs
Ambient Temperature
Figure 2. Maximum Continuous Drain Current vs
Case Temperature
Figure 3. Normalized Maximum Transient Thermal Impedance
Figure 4. Peak Current Capability
TC, CASE TEMPERATURE (
oC)
0
0
25
50
75
100
175
0.2
0.4
0.6
0.8
1.0
1.2
125
150
TC, CASE TEMPERATURE (
oC)
0
20
40
60
25
50
75
100
125
150
175
VGS = 4.5V
VGS = 10V
0.1
1
10-5
10-4
10-3
10-2
10-1
100
101
0.01
2
t, RECTANGULAR PULSE DURATION (s)
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
PDM
t1
t2
0.5
0.2
0.1
0.05
0.01
0.02
DUTY CYCLE - DESCENDING ORDER
SINGLE PULSE
100
1000
10-5
10-4
10-3
10-2
10-1
100
101
40
t, PULSE WIDTH (s)
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
TC = 25
oC
I = I25
175 - TC
150
FOR TEMPERATURES
ABOVE 25oC DERATE PEAK
CURRENT AS FOLLOWS:
VGS = 10V
VGS = 5V




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