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PS4066 数据表(PDF) 3 Page - Pericom Semiconductor Corporation |
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PS4066 数据表(HTML) 3 Page - Pericom Semiconductor Corporation |
3 / 9 page 3 PS8184A 10/15/98 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PS4066/PS4066A Low-Cost, Quad, SPST, CMOS Analog Switches r e t e m a r a Pl o b m y Ss n o it i d n o C) C ° ( p m e Tn i M )1 ( p y T ) 2 ( x a M ) 1 ( s ti n U t u p n I c i g o L h ti w t n e rr u C t u p n I h g i H e g a tl o V t u p n I I H N I V 8 . 0 = s r e h t o ll a , V 5 = N I ll u F 5 . 0 -5 0 0 . 05 . 0 µA h ti w t n e rr u C t u p n I w o L e g a tl o V t u p n I I L N I V 5 = s r e h t o ll a , V 8 . 0 = N I5 . 0 -5 0 0 . 05 . 0 c i m a n y D e m i T n O - n r u Tt N O V M O C 2 e r u g i F , V 0 1 = 5 25 40 0 1 s n ll u F0 5 1 e m i T ff O - n r u Tt F F O 5 27 15 7 ll u F0 0 1 l e n n a h C - n O h t d i w d n a B W B m b d 0 = l a n g i S 0 5 , 4 e r u g i F Ω t u o d n a n i 5 2 0 0 1z H M n o it c e j n I e g r a h C ) 3 ( Q CL , F n 1 =V N E G R , V 0 = N E G 0 = Ω, 3 e r u g i F 20 1C p n o it al o s I ff OR R I ORL 0 5 = Ω C , L 4 e r u g i F ,z H M 1 = f , F p 5 =8 5 - B d k l a t s s o r C ) 8 ( X K L A T RL 0 5 = Ω C , L 5 e r u g i F ,z H M 1 = f , F p 5 =6 8 - e c n a ti c a p a C O NC )F F O ( 6 e r u g i F ,z H M 1 = f9 F p ff O M O C e c n a ti c a p a C 6 e r u g i F ,z H M 1 = f9 n O M O C e c n a ti c a p a C C ) N O ( M O C 7 e r u g i F ,z H M 1 = f2 2 y l p p u S y l p p u S e v it i s o P t n e rr u C + I V NI , + V r o V 0 = ff o r o n o sl e n n a h c ll a ll u F 1 -1 0 0 . 01 µA ci n o m r a H l a t o T n o it r o t si D D H T 3 0 . 0% Electrical Specifications - Single +12V Supply (continued) (V+ = 12V ±10%, GND = 0V, V INH = 4V, VINL = 0.8V) Notes: 1. The algebraic convention, where the most negative value is a minimum and the most positive is a maximum, is used in this data sheet. 2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing. 3. Guaranteed by design 4. ∆RΟΝ = ∆RΟΝ max - ∆RΟΝ min 5. Flatness is defined as the difference between the maximum and minimum value of on-resistance measured. 6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25ºC. 7. Off Isolation = 20log10 [ VCOM / (VNO or VNO) ], VCOM = 0utput, VNC /VNO = input to off switch 8. Between any two switches. |
类似零件编号 - PS4066 |
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类似说明 - PS4066 |
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