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AD7612 Datasheet(数据表) 4 Page - Analog Devices

部件型号  AD7612
说明  16-Bit, 750 kSPS, Unipolar/Bipolar Programmable Input PulSAR ADC
下载  32 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
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AD7612
Rev. 0 | Page 4 of 32
Parameter
Conditions/Comments
Min
Typ
Max
Unit
REFERENCE BUFFER
PDREF = high
REFBUFIN Input Voltage Range
2.4
2.5
2.6
V
EXTERNAL REFERENCE
PDREF = PDBUF = high
Voltage Range
REF
4.75
5
AVDD + 0.1
V
Current Drain
750 kSPS throughput
250
μA
TEMPERATURE PIN
Voltage Output
@ 25°C
311
mV
Temperature Sensitivity
1
mV/°C
Output Resistance
4.33
DIGITAL INPUTS
Logic Levels
VIL
−0.3
+0.6
V
VIH
2.1
OVDD + 0.3
V
IIL
−1
+1
μA
IIH
−1
+1
μA
DIGITAL OUTPUTS
Data Format
Parallel or serial 16-bit
Pipeline Delay6
VOL
ISINK = 500 μA
0.4
V
VOH
ISOURCE = –500 μA
OVDD − 0.6
V
POWER SUPPLIES
Specified Performance
AVDD
4.757
5
5.25
V
DVDD
4.75
5
5.25
V
OVDD
2.7
5.25
V
VCC
7
15
15.75
V
VEE
−15.75
−15
0
V
Operating Current8, 9
@ 750 kSPS throughput
AVDD
With Internal Reference
19.5
mA
With Internal Reference Disabled
18
mA
DVDD
6.5
mA
OVDD
0.5
mA
VCC
VCC = 15 V, with internal reference buffer
3
mA
VCC = 15 V
2.3
mA
VEE
VEE = −15 V
2
mA
Power Dissipation
@ 750 kSPS throughput
With Internal Reference
PDREF = PDBUF = low
205
230
mW
With Internal Reference Disabled
PDREF = PDBUF = high
190
210
mW
In Power-Down Mode10
PD = high
10
μW
TEMPERATURE RANGE11
Specified Performance
TMIN to TMAX
−40
+85
°C
1 With VIN = 0 V to 5 V or 0 V to 10 V ranges, the input current is typically 70 μA. In all input ranges, the input current scales with throughput. See the Analog Inputs section.
2 All specified performance is guaranteed up to 750 kSPS throughout, however throughputs up to 900 kSPS can be used with some linearity performance degradation.
3 Linearity is tested using endpoints, not best fit. All linearity is tested with an external 5 V reference.
4 LSB means least significant bit. All specifications in LSB do not include the error contributed by the reference.
5 All specifications in decibels are referred to a full-scale range input, FSR. Tested with an input signal at 0.5 dB below full-scale, unless otherwise specified.
6 Conversion results are available immediately after completed conversion.
7 4.75 V or VREF – 0.1 V, whichever is larger.
8 Tested in parallel reading mode.
9 With internal reference, PDREF = PDBUF = low; with internal reference disabled, PDREF = PDBUF = high. With internal reference buffer, PDBUF = low.
10 With all digital inputs forced to OVDD.
11 Consult sales for extended temperature range.




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