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ADV7188 数据表(PDF) 10 Page - Analog Devices |
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ADV7188 数据表(HTML) 10 Page - Analog Devices |
10 / 112 page ADV7188 Rev. 0 | Page 10 of 112 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 2 HS 3 DGND 4 DVDDIO 7 P13 6 P14 5 P15 1 VS 8 P12 9 DGND 10 DVDD 12 SFL 13 TEST2 14 DGND 15 DVDDIO 16 TEST8 17 P11 18 P10 19 P9 20 P8 11 INT 59 58 57 54 55 56 60 53 52 AIN11 AIN4 AIN10 CAPC1 CAPC2 AGND AIN5 AGND CML 51 REFOUT 49 CAPY2 48 CAPY1 47 AGND 46 AIN3 45 AIN9 44 AIN2 43 AIN8 42 AIN1 41 AIN7 50 AVDD 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 PIN 1 ADV7188 TOP VIEW (Not to Scale) Figure 5. 80-Lead LQFP Pin Configuration Table 7. Pin Function Descriptions Pin No. Mnemonic Type Function 3, 9, 14, 31, 71 DGND G Digital Ground. 39, 47, 53, 56 AGND G Analog Ground. 4, 15 DVDDIO P Digital I/O Supply Voltage (3.3 V). 10, 30, 72 DVDD P Digital Core Supply Voltage (1.8 V). 50 AVDD P Analog Supply Voltage (3.3 V). 38 PVDD P PLL Supply Voltage (1.8 V). 42, 44, 46, 58, 60, 62, 41, 43, 45, 57, 59, 61 AIN1 to AIN12 I Analog Video Input Channels. 11 INT O Interrupt Request Output. Interrupt occurs when certain signals are detected on the input video. See the User Sub Map register details in Table 103. 40 FB I Fast Blank. FB is a fast switch overlay input that switches between CVBS and RGB analog signals. 70, 78, 13, 25, 69, 63 TEST0 to TEST5 Leave these pins unconnected. 77, 65 TEST6 to TEST7 Tie to AGND 16 TEST8 Tie to DVDDIO 35, 34, 33, 32, 24, 23, 22, 21, 20, 19, 18, 17, 8, 7, 6, 5, 76, 75, 74, 73 P0 to P19 O Video Pixel Output Port. 2 HS O Horizontal Synchronization Output Signal. 1 VS O Vertical Synchronization Output Signal. 80 FIELD O Field Synchronization Output Signal. 67 SDA I/O I2C Port Serial Data Input/Output Pin. 68 SCLK I I2C Port Serial Clock Input (Max Clock Rate of 400 kHz). |
类似零件编号 - ADV7188 |
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类似说明 - ADV7188 |
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