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MC74AC373D 数据表(PDF) 2 Page - Motorola, Inc |
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MC74AC373D 数据表(HTML) 2 Page - Motorola, Inc |
2 / 8 page MC74AC373 MC74ACT373 5-2 FACT DATA FUNCTIONAL DESCRIPTION The MC74AC373/74ACT373 contains eight D-type latches with 3-state standard outputs. When the Latch Enable (LE) input is HIGH, data on the Dn inputs enters the latches. In this condition the latches are transparent, i.e., a latch output will change state each time its D input changes. When LE is LOW, the latches store the information that was present on the D inputs a setup time preceding the HIGH-to-LOW transition of LE. The 3-state standard outputs are controlled by the Output Enable (OE) input. When OE is LOW, the standard outputs are in the 2-state mode. When OE is HIGH, the standard outputs are in the high impedance mode but this does not interfere with entering new data into the latches. D G O D G O D G O D G O D G O D G O D G O D G O D1 D2 D3 D4 D5 D6 D7 LE OE O0 O1 O2 O3 O4 O5 O6 O7 D0 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. LOGIC DIAGRAM |
类似零件编号 - MC74AC373D |
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类似说明 - MC74AC373D |
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