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HY5DU28422DT 数据表(PDF) 26 Page - Hynix Semiconductor |
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HY5DU28422DT 数据表(HTML) 26 Page - Hynix Semiconductor |
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26 / 33 page  Rev. 0.0 / Apr. 2003 26 HY5DU28422D(L)T HY5DU28822D(L)T HY5DU281622D(L)T DC CHARACTERISTICS II (TA=0 to 70 oC, Voltage referenced to VSS = 0V) 8Mx16 Parameter Symbol Test Condition Speed Unit Note -D4 -D43 Operating Current IDD0 One bank; Active - Precharge ; tRC=tRC(min); tCK=tCK(min) ; DQ,DM and DQS inputs changing twice per clock cycle; address and control inputs changing once per clock cycle 120 mA Operating Current IDD1 One bank; Active - Read - Precharge; Burst Length=2; tRC=tRC(min); tCK=tCK(min); address and control inputs changing once per clock cycle 120 mA Precharge Power Down Standby Current IDD2P All banks idle; Power down mode; CKE=Low, tCK=tCK(min) 10 mA Idle Standby Current IDD2N Vin>=Vih(min) or Vin=<Vil(max) for DQ, DQS and DM 60 mA Idle Standby Current IDD2F /CS=High, All banks idle; tCK=tCK(min); CKE=High; address and control inputs changing once per clock cycle. VIN=VREF for DQ, DQS and DM 60 mA Idle Quiet Standby Current IDD2Q /CS>=Vih(min); All banks idle; CKE>=Vih(min); Addresses and other control inputs stable, Vin=Vref for DQ, DQS and DM 50 mA Active Power Down Standby Current IDD3P One bank active; Power down mode; CKE=Low, tCK=tCK(min) 10 mA Active Standby Current IDD3N /CS=HIGH; CKE=HIGH; One bank; Active-Precharge; tRC=tRAS(max); tCK=tCK(min); DQ, DM and DQS inputs changing twice per clock cycle; Address and other control inputs changing once per clock cycle 65 mA Operating Current IDD4R Burst=2; Reads; Continuous burst; One bank active; Address and control inputs changing once per clock cycle; tCK=tCK(min); IOUT=0mA 170 mA Operating Current IDD4W Burst=2; Writes; Continuous burst; One bank active; Address and control inputs changing once per clock cycle; tCK=tCK(min); DQ, DM and DQS inputs changing twice per clock cycle 190 Auto Refresh Current IDD5 tRC=tRFC(min) - 14*tCK for DDR400 at 200Mhz 180 Self Refresh Current IDD6 CKE =< 0.2V; External clock on; tCK=tCK(min) Normal 2 mA Low Power 1 mA Operating Current - Four Bank Operation IDD7 Four bank interleaving with BL=4, Refer to the following page for detailed test condition 260 mA Random Read Current IDD7A 4banks active read with activate every 20ns, AP(Auto Precharge) read every 20ns, BL=4, tRCD=3, IOUT=0 mA, 100% DQ, DM and DQS inputs changing twice per clock cycle; 100% addresses changing once per clock cycle 260 mA |
类似零件编号 - HY5DU28422DT |
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类似说明 - HY5DU28422DT |
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