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74HCT7080 Datasheet(数据表) 2 Page - NXP Semiconductors

部件型号  74HCT7080
说明  16-bit even/odd parity generator/checker
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制造商  PHILIPS [NXP Semiconductors]
网页  http://www.nxp.com
标志 

   
 2 page
background image
December 1990
2
Philips Semiconductors
Product specification
16-bit even/odd parity
generator/checker
74HC/HCT7080
FEATURES
• Word-length easily expanded by cascading
• Generates either even or odd parity for 16-data bits
• Output capability: standard
• ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT7080 are high-speed Si-gate CMOS
devices. They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT7080 are 16-bit parity generators or
checkers commonly used to detect errors in high-speed
data transmission or data retrieval systems.
The even and odd parity output is available for generating
or checking even/odd parity up to 16-bits.
The even/odd parity output (E/O) is HIGH when an even
number of data inputs (I0 to I15) are HIGH and the
cascade/even-odd-changing input (X) is HIGH.
Expansion to larger word sizes is accomplished by
connecting the even/odd parity output (E/O) to the
cascade/even-odd-changing input (X) of the final stage.
QUICK REFERENCE DATA
GND = 0 V; Tamb =25 °C; tr =tf = 6 ns
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD =CPD × VCC2 × fi + ∑ (CL ×VCC2 × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
∑ (CL × VCC2 × fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC − 1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
tPHL/ tPLH
propagation delay
CL = 15 pF; VCC =5 V
In to E/O
2932ns
X to E/O
1215ns
CI
input capacitance
3.5
3.5
pF
CPD
power dissipation capacitance per package
notes 1 and 2
24
25
pF




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