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74HC4515DB 数据表(PDF) 6 Page - NXP Semiconductors

部件名 74HC4515DB
功能描述  4-to-16 line decoder/demultiplexer with input latches; inverting
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制造商  PHILIPS [NXP Semiconductors]
网页  http://www.nxp.com
标志 PHILIPS - NXP Semiconductors

74HC4515DB 数据表(HTML) 6 Page - NXP Semiconductors

  74HC4515DB Datasheet HTML 1Page - NXP Semiconductors 74HC4515DB Datasheet HTML 2Page - NXP Semiconductors 74HC4515DB Datasheet HTML 3Page - NXP Semiconductors 74HC4515DB Datasheet HTML 4Page - NXP Semiconductors 74HC4515DB Datasheet HTML 5Page - NXP Semiconductors 74HC4515DB Datasheet HTML 6Page - NXP Semiconductors 74HC4515DB Datasheet HTML 7Page - NXP Semiconductors 74HC4515DB Datasheet HTML 8Page - NXP Semiconductors  
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September 1993
6
Philips Semiconductors
Product specification
4-to-16 line decoder/demultiplexer with
input latches; inverting
74HC/HCT4515
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr =tf = 6 ns; CL = 50 pF
SYMBOL
PARAMETER
Tamb (°C)
UNIT
TEST CONDITIONS
74HC
VCC
(V)
WAVEFORMS
+25
−40 to +85
−40 to +125
min.
typ.
max.
min.
max.
min.
max.
tPHL/ tPLH
propagation delay
An to Qn
80
29
23
250
50
43
315
63
54
375
75
64
ns
2.0
4.5
6.0
Fig.6
tPHL/ tPLH
propagation delay
LE to Qn
66
24
19
225
45
38
280
56
48
340
68
58
ns
2.0
4.5
6.0
Fig.6
tPHL/ tPLH
propagation delay
E to Qn
50
18
14
175
35
30
220
44
37
265
53
45
ns
2.0
4.5
6.0
Fig.6
tTHL/ tTLH
output transition time
19
7
6
75
15
13
95
19
16
110
22
19
ns
2.0
4.5
6.0
Fig.6
tW
latch enable pulse width
HIGH
75
15
13
14
5
4
95
19
16
110
22
19
ns
2.0
4.5
6.0
Fig.7
tsu
set-up time
An to LE
90
18
15
28
10
8
115
23
20
135
27
23
ns
2.0
4.5
6.0
Fig.7
th
hold time
An to LE
0
0
0
−11
−4
−3
0
0
0
0
0
0
ns
2.0
4.5
6.0
Fig.7


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