Philips Semiconductors

Product specification

74ALS646/74ALS646-1

74ALS648/74ALS648-1

Transceiver/register

74ALS646/646-1

Octal transceiver/register, non-inverting (3-State)

74ALS648/648-1

Octal transceiver/register, inverting (3-State)

2

1991 Feb 08

853–1408 01670

FEATURES

one chip

DESCRIPTION

The 74ALS646/74ALS646-1 and 74ALS648/74ALS648-1

transceivers/registers consist of bus transceiver circuits with 3-State

outputs, D-type flip-flops, and control circuitry arranged for

multiplexed transmission of data directly from the input bus or the

internal registers. Data on the A or B bus will be clocked into the

registers as the appropriate clock pin goes High. Output enable

(OE) and direction (DIR) and select (SAB, SBA) pins are provided

for bus management.

limited to 5.0V

±0.25V.

TYPE

TYPICAL

SUPPLY CURRENT

(TOTAL)

74ALS646/646-1

140MHz

48mA

74ALS648/648-1

140MHz

54mA

ORDERING INFORMATION

ORDER CODE

DESCRIPTION

COMMERCIAL RANGE

DRAWING

NUMBER

24-pin plastic DIP

74ALS646N, 74ALS646-1N,

74ALS648N, 74ALS648-1N

SOT222-1

24-pin plastic SOL

74ALS646D, 74ALS646-1D,

74ALS648D, 74ALS648-1D

SOT137-1

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

PINS

DESCRIPTION

74ALS (U.L.)

HIGH/LOW

LOAD VALUE

HIGH/LOW

A0 – A7

A inputs

1.0/1.0

20

µA/0.1mA

B0 – B7

B inputs

1.0/1.0

20

µA/0.1mA

CPAB

A-to-B clock input

1.0/1.0

20

µA/0.1mA

CPBA

B-to-A clock input

1.0/1.0

20

µA/0.1mA

SAB

A-to-B select input

1.0/1.0

20

µA/0.1mA

SBA

B-to-A select input

1.0/1.0

20

µA/0.1mA

DIR

Data flow directional control input

1.0/1.0

20

µA/0.1mA

OE

Output enable input

1.0/1.0

20

µA/0.1mA

A0 – A7, B0 – B7

Data outputs

750/240

15mA/24mA

A0 – A7, B0 – B7

Data outputs (-1 version)

750/480

15mA/48mA

NOTE:

One (1.0) ALS unit load is defined as: 20

µA in the High state and 0.1mA in the Low state.