数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

GS815036AB-333 数据表(PDF) 6 Page - GSI Technology

部件名 GS815036AB-333
功能描述  1M x 18, 512K x 36 18Mb Register-Register Late Write SRAM
Download  25 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  GSI [GSI Technology]
网页  http://www.gsitechnology.com
标志 GSI - GSI Technology

GS815036AB-333 数据表(HTML) 6 Page - GSI Technology

Back Button GS815036AB-333 Datasheet HTML 2Page - GSI Technology GS815036AB-333 Datasheet HTML 3Page - GSI Technology GS815036AB-333 Datasheet HTML 4Page - GSI Technology GS815036AB-333 Datasheet HTML 5Page - GSI Technology GS815036AB-333 Datasheet HTML 6Page - GSI Technology GS815036AB-333 Datasheet HTML 7Page - GSI Technology GS815036AB-333 Datasheet HTML 8Page - GSI Technology GS815036AB-333 Datasheet HTML 9Page - GSI Technology GS815036AB-333 Datasheet HTML 10Page - GSI Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 25 page
background image
Register-Register Late Write, Pipelined Read Truth Table
CK
ZZ
SS
SW
Bx
G
Current Operation
DQ
(tn)
DQ
(tn+1)
X
1
X
X
X
X
Sleep (Power Down) mode
Hi-Z
Hi-Z
0
1
X
X
X
Deselect
***
Hi-Z
0
0
1
X
1
Read
Hi-Z/
Hi-Z
0
0
1
X
0
Read
***
Q(tn)
0
0
0
0
X
Write All Bytes
***
D(tn)
0
0
0
X
X
Write Bytes with Bx = 0
***
D(tn)
0
0
0
1
X
Write (Abort)
***
Hi-Z
Notes:
1. If one or more Bx = 0, then B = “T” else B = “F”.
2. “1” = input “high”; “0” = input “low”; “X” = input “don’t care”.
3. “***” indicates that the DQ input requirement/output state and CQ output state are determined by the previous operation.
4. DQs are tristated in response to Bank Deselect, Deselect, and Write commands, one full cycle after the command is sampled.
5. CQs are tristated in response to Bank Deselect commands only, one full cycle after the command is sampled.
6. Up to three (3) Continue operations may be initiated after a Read or Write operation is initiated to burst transfer up to four (4) distinct pieces
of data per single external address input. If a fourth (4th) Continue operation is initiated, the internal address wraps back to the initial exter-
nal (base) address.
GS815018/36AB-357/333/300/250
Product Preview
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.05 10/2005
6/25
© 2003, GSI Technology


类似零件编号 - GS815036AB-333

制造商部件名数据表功能描述
logo
GSI Technology
GS8150V18AB GSI-GS8150V18AB Datasheet
797Kb / 25P
   1M x 18, 512K x 36 18Mb Register-Register Late Write SRAM
GS8150V18AB-250 GSI-GS8150V18AB-250 Datasheet
797Kb / 25P
   1M x 18, 512K x 36 18Mb Register-Register Late Write SRAM
GS8150V18AB-250I GSI-GS8150V18AB-250I Datasheet
797Kb / 25P
   1M x 18, 512K x 36 18Mb Register-Register Late Write SRAM
GS8150V18AB-300 GSI-GS8150V18AB-300 Datasheet
797Kb / 25P
   1M x 18, 512K x 36 18Mb Register-Register Late Write SRAM
GS8150V18AB-300I GSI-GS8150V18AB-300I Datasheet
797Kb / 25P
   1M x 18, 512K x 36 18Mb Register-Register Late Write SRAM
More results

类似说明 - GS815036AB-333

制造商部件名数据表功能描述
logo
GSI Technology
GS8150V18AB GSI-GS8150V18AB Datasheet
797Kb / 25P
   1M x 18, 512K x 36 18Mb Register-Register Late Write SRAM
logo
Cypress Semiconductor
CY7C1330AV25 CYPRESS-CY7C1330AV25 Datasheet
397Kb / 19P
   18-Mbit (512K x 36/1Mbit x 18) Pipelined Register-Register Late Write
logo
GSI Technology
GS8161E18BT GSI-GS8161E18BT Datasheet
1Mb / 35P
   1M x 18, 512K x 36, 512K x 36 18Mb Sync Burst SRAMs
GS8161E18BT-V GSI-GS8161E18BT-V Datasheet
1Mb / 35P
   1M x 18, 512K x 36, 512K x 36 18Mb Sync Burst SRAMs
logo
Cypress Semiconductor
CY7C1380CV25 CYPRESS-CY7C1380CV25 Datasheet
519Kb / 33P
   512K x 36/1M x 18 Pipelined SRAM
CY7C1380B CYPRESS-CY7C1380B Datasheet
841Kb / 34P
   512K x 36/1M x 18 Pipelined SRAM
logo
GSI Technology
GS8160E18T GSI-GS8160E18T Datasheet
622Kb / 25P
   1M x 18, 512K x 36 18Mb Sync Burst SRAMs
GS816018BT GSI-GS816018BT Datasheet
925Kb / 24P
   1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs
GS8160F18T GSI-GS8160F18T Datasheet
544Kb / 22P
   1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs
GS8160E18BT-V GSI-GS8160E18BT-V Datasheet
926Kb / 23P
   1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25


数据表 下载

Go To PDF Page


链接网址




隐私政策
ALLDATASHEETCN.COM
ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com