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GS82032AT-5 数据表(PDF) 8 Page - GSI Technology

部件名 GS82032AT-5
功能描述  64K x 32 2Mb Synchronous Burst SRAM
Download  22 Pages
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制造商  GSI [GSI Technology]
网页  http://www.gsitechnology.com
标志 GSI - GSI Technology

GS82032AT-5 数据表(HTML) 8 Page - GSI Technology

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GS82032AT-180/166/150/133/100/66/4/5/6
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.12 10/2004
8/22
© 2000, GSI Technology
Simplified State Diagram
First Write
First Read
Burst Write
Burst Read
Deselect
R
W
CR
CW
X
X
WR
R
WR
X
X
X
CR
R
CW
CR
CR
Notes:
1. The diagram shows only supported (tested) synchronous state transitions. The diagram presumes G is tied low.
2. The upper portion of the diagram assumes active use of only the Enable (E1, E2, E3) and Write (BA, BB, BC, BD, BW, and GW) control
inputs, and that ADSP is tied high and ADSC is tied low.
3. The upper and lower portions of the diagram together assume active use of only the Enable, Write, and ADSC control inputs, and
assumes ADSP is tied high and ADV is tied low.


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