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74ABT273A 数据表(PDF) 2 Page - NXP Semiconductors

部件名 74ABT273A
功能描述  Octal D-type flip-flop
Download  12 Pages
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制造商  PHILIPS [NXP Semiconductors]
网页  http://www.nxp.com
标志 PHILIPS - NXP Semiconductors

74ABT273A 数据表(HTML) 2 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
74ABT273A
Octal D-type flip-flop
2
1995 Sep 06
853-1774 15704
FEATURES
Eight edge-triggered D-type flip-flops
Buffered common clock
Buffered asynchronous Master Reset
Power-up reset
See 74ABT377 for clock enable version
See 74ABT373 for transparent latch version
See 74ABT374 for 3-State version
ESD protection exceeds 2000 V per Mil Std 833 Method 3015 and
200 V per machine model.
DESCRIPTION
The 74ABT273A has eight edge-triggered D-type flip-flops with
individual D inputs and Q outputs. The common buffered Clock (CP)
and Master Reset (MR) inputs load and reset (clear) all flip-flops
simultaneously.
The register is fully edge-triggered. The state of each D input, one
setup time before the Low-to-High clock transition, is transferred to
the corresponding flip-flop’s Q output.
All outputs will be forced Low independent of Clock or Data inputs
by a Low voltage level on the MR input. The device is useful for
applications where the true output only is required and the CP and
MR are common elements.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
Tamb = 25°C; GND = 0V
TYPICAL
UNIT
tPLH
tPHL
Propagation delay
CP to Qn
CL = 50pF; VCC = 5V
3.0
3.4
ns
CIN
Input capacitance
VI = 0V or VCC
3.5
pF
ICCH
Total supply current
Outputs High; VCC =5.5V
150
µA
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
20-Pin Plastic DIP
–40
°C to +85°C
74ABT273A N
74ABT273A N
SOT146-1
20-Pin plastic SO
–40
°C to +85°C
74ABT273A D
74ABT273A D
SOT163-1
20-Pin Plastic SSOP Type II
–40
°C to +85°C
74ABT273A DB
74ABT273A DB
SOT339-1
20-Pin Plastic TSSOP Type I
–40
°C to +85°C
74ABT273A PW
7ABT273APW DH
SOT360-1
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
MR
Q0
D0
D1
Q1
Q2
D2
D3
Q3
Q4
GND
D4
D5
Q5
Q6
D6
D7
Q7
VCC
CP
SA00052
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
NAME AND FUNCTION
11
CP
Clock pulse input (active rising edge)
3, 4, 7, 8, 13,
14, 17, 18
D0 - D7
Data inputs
2, 5, 6, 9, 12,
15, 16, 19
Q0 - Q7
Data outputs
1
MR
Master Reset input (active-Low)
10
GND
Ground (0V)
20
VCC
Positive supply voltage


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