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GS8150V36AB-357I 数据表(PDF) 8 Page - GSI Technology |
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GS8150V36AB-357I 数据表(HTML) 8 Page - GSI Technology |
8 / 25 page GS8150V18/36AB-357/333/300/250 Product Preview Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. Rev: 1.04 4/2005 8/25 © 2003, GSI Technology HSTL I/O DC Input Characteristics Parameter Symbol Min Typ Max Units Notes DC Input Logic High VIH (dc) VREF + 100 — VDDQ + 300 mV DC Input Logic Low VIL (dc) –300 — VREF – 100 mV DC Clock Input Differential Voltage VDIF (dc) 100 — VDDQ + 300 mV 2 VREF DC Voltage VREF (dc) VDDQ /2 – 0.1 — VDDQ /2 + 0.1 V 1 Clock Input Voltag VCK (dc) –300 — VDDQ + 300 V Clock Input Commone Mode Voltage VCM (dc) 600 750 900 V Notes: 1. The peak to peak AC component superimposed on VREF may not exceed 5% of the DC component of VREF. 2. SRAM performance is a function of clock input differential voltage (VDIF). 3. To guarantee AC characteristics, VIH,VIL,Trise and Tfall of inputs and clocks must be within 10% of each other. 4. For devices supplied with HSTL I/O input buffers.Compatible with both 1.8 V and 1.5 V I/O drivers. 5. See AC Input Definition drawing below. HSTL I/O AC Input Characteristics Parameter Symbol Min Max Units Notes AC Input Logic High VIH (ac) VREF + 200 — mV 3,4 AC Input Logic Low VIL (ac) — VREF – 200 mV 3,4 AC Clock Input Differential Voltage VDIF (ac) 800 — mV 2,3 VREF Peak to Peak AC Voltage VREF (ac) — 5% VREF (DC) mV 1 Notes: 1. The peak to peak AC component superimposed on VREF may not exceed 5% of the DC component of VREF. 2. SRAM performance is a function of clock input differential voltage (VDIF). The RAM can be operated with a single ended clocking with either CK or CK tied to VREF. 3. To guarantee AC characteristics, VIH,VIL,Trise and Tfall of inputs and clocks must be within 10% of each other. 4. For devices supplied with HSTL I/O input buffers.Compatible with both 1.8 V and 1.5 V I/O drivers. 5. See AC Input Definition drawing below. |
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