SN74GTLPH16945

16-BIT LVTTL-TO-GTLP BUS TRANSCEIVER

SCES292D – OCTOBER 1999 – REVISED NOVEMBER 2001

3

POST OFFICE BOX 655303

functional description

The SN74GTLPH16945 is a medium-drive (50 mA), 16-bit bus transceiver partitioned as two 8-bit segments

and is designed for asynchronous communication between data buses. The device transmits data from the

A port to the B port or from the B port to the A port, depending on the logic level at the direction-control (DIR)

input. OE can be used to disable the device so the buses are effectively isolated. Data polarity is noninverting.

For A-to-B data flow, when OE is low and DIR is high, the B outputs take on the logic value of the A inputs. When

OE is high, the outputs are in the high-impedance state.

The data flow for B to A is similar to that of A to B, except OE and DIR are low.

FUNCTION TABLE

INPUTS

OUTPUT

MODE

OE

DIR

OUTPUT

MODE

H

X

Z

Isolation

L

L

B data to A port

True transparent

L

H

A data to B port

True transparent

logic diagram (positive logic)

1DIR

1OE

1A1

1B1

1

2

48

47

2DIR

2OE

2A1

2B1

24

13

25

36

To Seven Other Channels

VREF

31

To Seven Other Channels

Pin numbers shown are for the DGG and DGV packages.