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SMS46GR06 数据表(PDF) 8 Page - Summit Microelectronics, Inc. |
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SMS46GR06 数据表(HTML) 8 Page - Summit Microelectronics, Inc. |
8 / 17 page 8 SMS46 2083 1.1 06/04/04 SUMMIT MICROELECTRONICS, Inc. Preliminary Information Table 2. Configuration Register 4 DEVICE OPERATION AND CONFIGURATION REGISTERS SUPPLY AND MONITOR FUNCTIONS The V0, V1, V2, and V3 inputs are internally ORed so that any one of the four can act as the device supply. The RESET# outputs will be guaranteed true so long as one of the four pins is at or above 1V. Note: for performing a memory operation (Read or Write) and to have the ability to change configuration register contents at least one sup- ply input must be above 2.7V. Read/Write operations require a 0.1µF capacitor from the VDD_CAP node to GND. For optimum performance connect capacitors from each of the Vx inputs to GND. Locate the capacitors as physically close to the SMS46 as possible. Associated with each input is a comparator with a program- mable threshold for detection of under-voltage or over- voltage conditions on any of the four supply inputs. The threshold can be programmed in 5mV increments any- where within the range of 0.6V to 1.875V or 15mV incre- ments within the range of 1.8V to 5.625V. Configuration registers 0, 1, 2, and 3 adjust the thresholds for V0, V1, V2, and V3 respectively. If the value contained in any register is all zeroes, the corresponding threshold will be 0.6V. If the contents were low range 05HEX the threshold would then be 0.625V [0.6V + (5 × 0.005V)]. All four registers are configured as 8-Bit registers. Table 1. Configuration Registers 0, 1, 2, and 3 RESET# FUNCTION Each RESET# output has a programmable source for activation. Configuration register 4 is used for enabling the activation source. A monitor input can be programmed to activate on either an under-voltage or over-voltage condi- tion, but not both conditions. When this condition ceases, each individual RESET# output will remain active for tPRTO (programmable reset time-out). The reset threshold voltage range for V0 to V3 can be set for 5mV increments below 1.875V (low Range = "0") or for 15mV increments above 1.8V (high range = "1") using Bits D3:0. The RESET#0-3 outputs have two hardwired sources for activation: the MR# input and Watchdog timer. All RESET# outputs will remain active so long as MR# is low, and will continue driving the RESET# outputs for tPRTO (programmable reset time out) after MR# returns high. The MR# input cannot be bypassed or disabled. Refer to Figures 1, 2 and 3 for a detailed illustration of the relationships among the affected signals. The SMS46 provides the option of the monitors triggering on either an under-voltage or over-voltage condition. The low-order four bits of configuration register 5 program these options. WATCHDOG TIMER The SMS46 contains an independent timer that can be programmed. The Watchdog generates all RESET#s if it times out. The timer is cleared by a low to high transition on WLDI and will reset all four RESET#. If the watchdog should time-out the device status can be monitored in the status register (Table 4). Refer to Figure 3 which illustrates the action of RESET#0-3 with respect to the Watchdog timer and the WLDI input. 7 D B S M 6 D5 D4 D3 D2 D1 D 0 D B S L n o i t c A V 3 V 2 V 1 V 0 V 3 V 2 V 1 V 0 e l b a n E r e g g i r T T E S E R e g n a R d l o h s e r h T e g a t l o V t c e l e S 0000 w o L e g n a R 1111 h g i H e g n a R 7 D B S M 6 D5 D4 D3 D2 D1 D 0 D B S L n o i t c A 1 1 1111 1 1 V 5 2 6 . 5 = t n e m t s u j d a d l o h s e r h t t s e h g i H ) e g n a R h g i H ( 0 0 0000 0 0 V 6 . 0 = t n e m t s u j d a d l o h s e r h t t s e w o L ) e g n a R w o L ( 0 0 000 1 1 0 6 ( + V 6 . 0 = d l o h s e r h T × V 5 2 6 . 0 = ) V 5 0 0 . 0 ) . g . e ( |
类似零件编号 - SMS46GR06 |
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类似说明 - SMS46GR06 |
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