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DSPIC30F1013AT-30EP-ES 数据表(PDF) 3 Page - Microchip Technology |
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DSPIC30F1013AT-30EP-ES 数据表(HTML) 3 Page - Microchip Technology |
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3 / 220 page  2004 Microchip Technology Inc. Advance Information DS70138C-page 1 dsPIC30F3014/4013 High-Performance Modified RISC CPU: • Modified Harvard architecture • C compiler optimized instruction set architecture • Flexible addressing modes • 84 base instructions • 24-bit wide instructions, 16-bit wide data path • Up to 48 Kbytes on-chip Flash program space • 2 Kbytes of on-chip data RAM • 1 Kbyte of non-volatile data EEPROM • 16 x 16-bit working register array • Up to 30 MIPs operation: - DC to 40 MHz external clock input - 4 MHz-10 MHz oscillator input with PLL active (4x, 8x, 16x) • Up to 33 interrupt sources: - 8 user selectable priority levels - 3 external interrupt sources - 4 processor traps DSP Features: • Dual data fetch • Modulo and Bit-reversed modes • Two 40-bit wide accumulators with optional saturation logic • 17-bit x 17-bit single cycle hardware fractional/ integer multiplier • All DSP instructins are single cycle - Multiply-Accumulate (MAC) operation • Single cycle ±16 shift Peripheral Features: • High current sink/source I/O pins: 25 mA/25 mA • Up to five 16-bit timers/counters; optionally pair up 16-bit timers into 32-bit timer modules • Up to four 16-bit Capture input functions • Up to four 16-bit Compare/PWM output functions • Data Converter Interface (DCI) supports common audio Codec protocols, including I2S and AC’97 • 3-wire SPI™ module (supports 4 Frame modes) •I2C™ module supports Multi-Master/Slave mode and 7-bit/10-bit addressing • Up to two addressable UART modules with FIFO buffers • CAN bus module compliant with CAN 2.0B standard Analog Features: • 12-bit Analog-to-Digital Converter (A/D) with: - 100 Ksps conversion rate - Up to 13 input channels - Conversion available during Sleep and Idle • Programmable Low Voltage Detection (PLVD) • Programmable Brown-out Detection and Reset generation Special Microcontroller Features: • Enhanced Flash program memory: - 10,000 erase/write cycle (min.) for industrial temperature range, 100K (typical) • Data EEPROM memory: - 100,000 erase/write cycle (min.) for industrial temperature range, 1M (typical) • Self-reprogrammable under software control • Power-on Reset (POR), Power-up Timer (PWRT) and Oscillator Start-up Timer (OST) • Flexible Watchdog Timer (WDT) with on-chip low power RC oscillator for reliable operation • Fail-Safe Clock Monitor operation: - Detects clock failure and switches to on-chip low power RC oscillator Note: This data sheet summarizes features of this group of dsPIC30F devices and is not intended to be a complete reference source. For more information on the CPU, peripherals, register descriptions and general device functionality, refer to the dsPIC30F Family Reference Manual (DS70046). For more information on the device instruction set and programming, refer to the dsPIC30F Programmer’s Reference Manual (DS70030). dsPIC30F3014/4013 High-Performance Digital Signal Controllers |
类似零件编号 - DSPIC30F1013AT-30EP-ES |
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类似说明 - DSPIC30F1013AT-30EP-ES |
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