EP1C6F256I7 datasheet(61/94 Pages) ALTERA

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EP1C6F256I7 数据表(PDF) 61 Page - Altera Corporation

部件名	EP1C6F256I7

功能描述	Cyclone FPGA Family

Download	94 Pages

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制造商	ALTERA [Altera Corporation]

网页	http://www.altera.com

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Preliminary Information

Cyclone FPGA Family Data Sheet

Cyclone devices support reconfiguring the I/O standard settings on the

IOE through the JTAG BST chain. The JTAG chain can update the I/O

standard for all input and output pins any time before or during user

mode. Designers can use this ability for JTAG testing before configuration

when some of the Cyclone pins drive or receive from other devices on the

board using voltage-referenced standards. Since the Cyclone device might

not be configured before JTAG testing, the I/O pins might not be

configured for appropriate electrical standards for chip-to-chip

communication. Programming those I/O standards via JTAG allows

designers to fully test I/O connection to other devices.

The JTAG pins support 1.5-V/1.8-V or 2.5-V/3.3-V I/O standards. The

TDO pin voltage is determined by the VCCIO of the bank where it resides.

The bank VCCIO selects whether the JTAG inputs are 1.5-V, 1.8-V, 2.5-V, or

3.3-V compatible.

Cyclone devices also use the JTAG port to monitor the operation of the

device with the SignalTap II embedded logic analyzer. Cyclone devices

support the JTAG instructions shown in Table 18.

类似零件编号 - EP1C6F256I7

制造商	部件名	数据表	功能描述
Altera Corporation	EP1C6F256I7ES	1Mb / 104P	Cyclone FPGA Family Data Sheet

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类似说明 - EP1C6F256I7

制造商	部件名	数据表	功能描述
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