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EP1C20F400C7 数据表(PDF) 5 Page - Altera Corporation |
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EP1C20F400C7 数据表(HTML) 5 Page - Altera Corporation |
5 / 94 page Altera Corporation 5 Preliminary Information Cyclone FPGA Family Data Sheet Figure 1. Cyclone EP1C12 Device Block Diagram The number of M4K RAM blocks, PLLs, rows, and columns vary per device. Table 4 lists the resources available in each Cyclone device. Logic Array PLL IOEs M4K Blocks EP1C12 Device Table 4. Cyclone Device Resources Device M4K RAM PLLs LAB Columns LAB Rows Columns Blocks EP1C3 1 13 1 24 13 EP1C4 1 17 2 26 17 EP1C6 1 20 2 32 20 EP1C12 2 52 2 48 26 EP1C20 2 64 2 64 32 |
类似零件编号 - EP1C20F400C7 |
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类似说明 - EP1C20F400C7 |
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