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TC9WMB1FK 数据表(PDF) 2 Page - Toshiba Semiconductor |
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TC9WMB1FK 数据表(HTML) 2 Page - Toshiba Semiconductor |
2 / 15 page TC9WMB1FK,TC9WMB2FK 2002-07-31 2 Block Diagram Pin Function Pin Name Input/Output Description SCL Input Serial clock input Data is fetched on a rising edge of SCL. Data is output on a falling edge of SCL. SDA Input/output Serial input/output This pin must be pulled up with a resistor because it is configured as an N-ch open-drain pin for output. WP Input Write protection input A high on this input disables writing. A low on this input enables writing. NC ¾ No connection (not connected internally) VCC 1.8 to 5.5 V (for reading) 2.3 to 5.5 V (for writing) GND Power supply 0 V (GND) Control circuit Address decoder Power supply (booster circuit) Memory cell Data register Timing generator Address register Serial clock input SCL Input/Output circuit VCC Power supply Write protection input WP GND Ground Command register Serial input/output SDA |
类似零件编号 - TC9WMB1FK |
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类似说明 - TC9WMB1FK |
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