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CS5231-3GDPR5 数据表(PDF) 9 Page - ON Semiconductor |
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CS5231-3GDPR5 数据表(HTML) 9 Page - ON Semiconductor |
9 / 14 page CS5231−3 http://onsemi.com 9 need for an external reset signal. The monitoring circuitry is located near the composite PNP−NPN output transistor, since this transistor is responsible for most of the on−chip power dissipation. The combination of current limit and thermal shutdown will protect the IC from nearly any fault condition. REVERSE CURRENT PROTECTION During normal system operation, the auxiliary drive circuitry will maintain voltage on the VOUT pin when VIN is absent. IC reliability and system efficiency are improved by limiting the amount of reverse current that flows from VOUT to ground and from VOUT to VIN. Current flows from VOUT to ground through the feedback resistor divider that sets up the output voltage This resistor can range in value from 6.0 k W to about 10 kW, and roughly 500 mA will flow in the typical case. Current flow from VOUT to VIN will be limited to leakage current after the IC shuts down. On−chip RC time constants are such that the output transistor should be turned off well before VIN drops below the VOUT voltage. CALCULATING POWER DISSIPATION AND HEATSINK REQUIREMENTS Most linear regulators operate under conditions that result in high on−chip power dissipation. This results in high junction temperatures. Since the IC has a thermal shutdown feature, ensuring the regulator will operate correctly under normal conditions is an important design consideration. Some heatsinking will usually be required. Thermal characteristics of an IC depend on four parameters: ambient temperature (TA in °C), power dissipation (PD in watts), thermal resistance from the die to the ambient air ( qJA in °C per watt) and junction temperature (TJ in °C). The maximum junction temperature is calculated from the formula below: TJ(MAX) + TA(MAX) ) (qJA PD(MAX)) Maximum ambient temperature and power dissipation are determined by the design, while qJA is dependent on the package manufacturer. The maximum junction temperature for operation of the CS5231−3 within specification is 150 °C. The maximum power dissipation of a linear regulator is given as PD(MAX) + (VIN(MAX) * VOUT(MIN)) (ILOAD(MAX) ) VIN(MAX)) IGND(MAX) where IGND(MAX) is the IC bias current. It is possible to change the effective value of qJA by adding a heatsink to the design. A heatsink serves in some manner to raise the effective area of the package, thus improving the flow of heat from the package into the surrounding air. Each material in the path of heat flow has its own characteristic thermal resistance, all measured in °C per watt. The thermal resistances are summed to determine the total thermal resistance between the die junction and air. There are three components of interest: junction−to−case thermal resistance ( qJC), case−to−heatsink thermal resistance (qCS) and heatsink−to−air thermal resistance ( qSA). The resulting equation for junction−to−air thermal resistance is qJA + qJC ) qCS ) qSA The value of qJC both packages of the CS5231−3 are provided in the Packaging Information section of this data sheet. The value of qCS can be considered zero, since heat is conducted out of the D2PAK package by the IC leads and the tab, and out of the SOIC−8 package by its IC leads that are soldered directly to the PC board. Modification of qSA is the primary means of thermal management. For surface mount components, this means modifying the amount of trace metal that connects to the IC. The thermal capacity of PC board traces is dependent on how much copper area is used, whether or not the IC is in direct contact with the metal, whether or not the metal surface is coated with some type of sealant, and whether or not there is airflow across the PC board. The chart provided below shows heatsinking capability of a square, single sided copper PC board trace. The area is given in square millimeters, and it is assumed there is no airflow across the PC board. Figure 20. Thermal Resistance Capability of Copper PC Board Metal Traces PC Board Trace Area (mm2) 70 0 2000 50 60 40 30 20 10 0 4000 6000 TYPICAL D2PAK PC BOARD HEATSINK DESIGN A typical design of the PC board surface area needed for the D2PAK package is shown on page 11. Calculations were made assuming VIN(MAX) = 5.25 V, VOUT(MIN) = 3.266 V, IOUT(MAX) = 500 mA, IGND(MAX) = 5.0 mA and TA = 70°C. PD + (5.25 V * 3.266 V) 0.5 A ) (5.25 V)(0.005 A) + 1018 mW Maximum temperature rise DT + TJ(MAX) * TA + 150°C * 70°C + 80°C qJA(worst case) + DT PD + 80°C 1.018 W + 78.56°C W |
类似零件编号 - CS5231-3GDPR5 |
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类似说明 - CS5231-3GDPR5 |
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