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ICE40LP1K-CB81TR1K 数据表(PDF) 19 Page - Lattice Semiconductor |
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ICE40LP1K-CB81TR1K 数据表(HTML) 19 Page - Lattice Semiconductor |
19 / 52 page iCE40 LP/HX Family Data Sheet © 2011-2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. FPGA-DS-02029-3.5 19 4. DC and Switching Characteristics 4.1. Absolute Maximum Ratings Table 4.1. Absolute Maximum Ratings* Parameter Min Max Unit Supply Voltage V CC –0.5 1.42 V Output Supply Voltage V CCIO –0.5 3.60 V NVCM Supply Voltage VPP_2V5 –0.5 3.60 V PLL Supply Voltage VCCPLL –0.5 1.42 V I/O Tri-state Voltage Applied –0.5 3.60 V Dedicated Input Voltage Applied –0.5 3.60 V Storage Temperature (Ambient) –65 150 °C Junction Temperature (TJ) –55 125 °C *Notes: Stress above those listed under the “Absolute Maximum Ratings” may cause permanent damage to the device. Functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Compliance with the Thermal Management document is required. All voltages referenced to GND. I/Os can support a 200 mV Overshoot above the Recommended Operating Conditions VCCIO (Max) and -200 mV Undershoot below VIL (Min). Overshoot and Undershoot is permitted for 25% duty cycle but must not exceed 1.6 ns. 4.2. Recommended Operating Conditions Table 4.2. Recommended Operating Conditions1 Symbol Parameter Min Max Unit V CC 1 Core Supply Voltage 1.14 1.26 V VPP_2V5 VPP_2V5 NVCM Programming and Operating Supply Voltage Slave SPI Configuration 1.71 3.46 V Master SPI Configuration 2.30 3.46 V Configuration from NVCM 2.30 3.46 V NVCM Programming 2.30 3.00 V VPP_FAST4 Optional fast NVCM programming supply. Leave unconnected. N/A N/A V VCCPLL5,6 PLL Supply Voltage 1.14 1.26 V VCCIO1,2,3 I/O Driver Supply Voltage VCCIO0-3 1.71 3.46 V VCC_SPI 1.71 3.46 V tJIND Junction Temperature, Industrial Operation –40 100 °C tPROG Junction Temperature NVCM Programming 10.00 30.00 °C Notes: 1. Like power supplies must be tied together. For example, if VCCIO and VCC_SPI are both the same voltage, they must also be the same supply. 2. See recommended voltages by I/O standard in subsequent table. 3. VCCIO pins of unused I/O banks should be connected to the VCC power supply on boards. 4. VPP_FAST, used only for fast production programming, must be left floating or unconnected in applications, except CM36 and CM49 packages MUST have the VPP_FAST ball connected to VCCIO_0 ball externally. 5. No PLL available on the iCE40LP384 and iCE40LP640 device. 6. VCCPLL is tied to VCC internally in packages without PLL pins. |
类似零件编号 - ICE40LP1K-CB81TR1K |
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类似说明 - ICE40LP1K-CB81TR1K |
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