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SI9123 数据表(PDF) 9 Page - Vishay Siliconix

部件名 SI9123
功能描述  500-kHz Half-Bridge DC-DC Converter With Integrated Secondary Synchronous Rectification Control
Download  16 Pages
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制造商  VISHAY [Vishay Siliconix]
网页  http://www.vishay.com
标志 VISHAY - Vishay Siliconix

SI9123 数据表(HTML) 9 Page - Vishay Siliconix

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Si9123
Vishay Siliconix
New Product
Document Number: 72098
S-03639—Rev. B, 20-Mar-03
www.vishay.com
9
The pre-regulator will remain on until VCC equals VREG but
between VUVLO and VREG, excessive current may result in
VCC falling below VUVLOand stopping soft-start operation. This
situation is avoided by the hysteresis between VREG and
VUVLO and correct sizing of the VCC capacitor, bootstrap
capacitor, the soft-start capacitor, the primary MOSFET gate
driving charge, and load on the SEC_SYNC output. The value
of the VCC capacitor should be chosen to be capable of
maintaining soft-start operation with VCC above VUVLO until the
VCC current can be supplied from the external circuit (e.g., via
an auxiliary winding on the secondary inductor).
CVCC
4.7
mF
GND
VCC
VREF
VIN
VINEXT
Figure 6.
High-Voltage Pre-Regulator Circuit
HVDMOS
14.5 V
REXT = 1.4 kW
Auxillary
VCC
The feedback voltage from the output of the auxiliary winding
must sustain VCC above VREG to fully disconnect the
pre-regulator, isolating VCC from VINEXT. VCC is then
maintained above VREG for the duration of operation. In the
event of an over voltage condition on VCC, an internal voltage
clamp turns on at 14.5 V to shunt excessive current to GND.
In systems where operation is directly from a 12 V supply,
VINEXT and VCC can be connected to the 12 V bus.
The soft-start circuit is designed for the dc-dc converter to start
up in an orderly manner and reduce component stress.
Soft-start is achieved by ramping the maximum attainable duty
cycle during the soft-start time. The duty cycle is increased
from zero to the final value at the rate set by an external
capacitor, CSS as shown in Figure 7. The hiccup time is set by
an internal 20
µA current source charging CSS from 0 V to
2 Vbe, at which point switching begins. Then a 100 µA charging
current is applied to CSS to charge from 2 Vbe to the final value
controlling the duty cycle as it rises. In the event of UVLO,
shutdown or over current, the SS pin will be held low (<1 V)
disabling driver switching. A longer soft-start time may be
needed for highly capacitive loads and high peak-output
current applications. In the event of an over current condition
being detected, the soft-start pin will be pulled low and the
cycle will start again performing a hiccup as shown in
Figure 4. The hiccup off-time, t1, is given by:
t
1 [ CSS
1.2 V
20
mA
The soft-start time t2 is can be estimated as:
t
2 [
C
SS
V
OUT
n
(K
100
mA)
where VOUT is the output of the converter, and n is the turns
ratio of the primary to each secondary winding, and K is the
ratio of the resistive divider from VINEXT to VINDET (typically
10/1).
-
+
GM
CSS
+
-
AV
AV
150 mV
Peak Detect
Blank
CS1
CS2
SS Control
Figure 7.
Current-Sense and Soft-Start Circuit Block Diagram
AV
100 mV
I
4I
VCC
SS
SS Enable


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