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EP1S30B1508C6ES 数据表(PDF) 50 Page - Altera Corporation |
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EP1S30B1508C6ES 数据表(HTML) 50 Page - Altera Corporation |
50 / 290 page 2–26 Altera Corporation Stratix Device Handbook, Volume 1 July 2005 TriMatrix Memory Figure 2–14. Shift Register Memory Configuration Memory Block Size TriMatrix memory provides three different memory sizes for efficient application support. The large number of M512 blocks are ideal for designs with many shallow first-in first-out (FIFO) buffers. M4K blocks provide additional resources for channelized functions that do not require large amounts of storage. The M-RAM blocks provide a large single block of RAM ideal for data packet storage. The different-sized blocks allow Stratix devices to efficiently support variable-sized memory in designs. The Quartus II software automatically partitions the user-defined memory into the embedded memory blocks using the most efficient size combinations. You can also manually assign the memory to a specific block size or a mixture of block sizes. m-Bit Shift Register w w m-Bit Shift Register m-Bit Shift Register m-Bit Shift Register w w w w w w w × m × n Shift Register n Number of Taps |
类似零件编号 - EP1S30B1508C6ES |
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类似说明 - EP1S30B1508C6ES |
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