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MSP430FG4619 数据表(PDF) 12 Page - Texas Instruments |
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MSP430FG4619 数据表(HTML) 12 Page - Texas Instruments |
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12 / 116 page  12 MSP430FG4619, MSP430FG4618, MSP430FG4617, MSP430FG4616 MSP430CG4619, MSP430CG4618, MSP430CG4617, MSP430CG4616 SLAS508K – APRIL 2006 – REVISED MAY 2020 www.ti.com Submit Documentation Feedback Product Folder Links: MSP430FG4619 MSP430FG4618 MSP430FG4617 MSP430FG4616 MSP430CG4619 MSP430CG4618 MSP430CG4617 MSP430CG4616 Terminal Configuration and Functions Copyright © 2006–2020, Texas Instruments Incorporated Table 4-1. Signal Descriptions (continued) SIGNAL NAME PIN NO. I/O DESCRIPTION PZ ZCA, ZQW P2.2 77 E8 I/O General-purpose digital I/O TB1 Timer_B7 CCR1. Capture: CCI1A/CCI1B input, compare: Out1 output P2.1 78 D8 I/O General-purpose digital I/O TB0 Timer_B7 CCR0. Capture: CCI0A/CCI0B input, compare: Out0 output P2.0 79 A10 I/O General-purpose digital I/O TA2 Timer_A Capture: CCI2A input, compare: Out2 output P1.7 80 B10 I/O General-purpose digital I/O CA1 Comparator_A input P1.6 81 A9 I/O General-purpose digital I/O CA0 Comparator_A input P1.5 82 B9 I/O General-purpose digital I/O TACLK Timer_A, clock signal TACLK input ACLK ACLK output (divided by 1, 2, 4, or 8) P1.4 83 B8 I/O General-purpose digital I/O TBCLK Input clock TBCLK – Timer_B7 SMCLK Submain system clock SMCLK output P1.3 84 A8 I/O General-purpose digital I/O TBOUTH Switch all PWM digital output ports to high impedance – Timer_B7 TB0 to TB6 SVSOUT SVS: output of SVS comparator P1.2 85 D7 I/O General-purpose digital I/O TA1 Timer_A, Capture: CCI1A input, compare: Out1 output P1.1 86 E7 I/O General-purpose digital I/O TA0 Timer_A. Capture: CCI0B input. Note: TA0 is only an input on this pin. BSL receive. MCLK MCLK output P1.0 87 A7 I/O General-purpose digital I/O TA0 Timer_A. Capture: CCI0A input, compare: Out0 output. BSL transmit. XT2OUT 88 B7 O Output terminal of crystal oscillator XT2 XT2IN 89 B6 I Input port for crystal oscillator XT2. Only standard crystals can be connected. TDO 90 A6 I/O Test data output port. TDO/TDI data output. TDI Programming data input terminal TDI 91 D6 I Test data input TCLK Test clock input. The device protection fuse is connected to TDI/TCLK. TMS 92 E6 I Test mode select. TMS is used as an input port for device programming and test. TCK 93 A5 I Test clock. TCK is the clock input port for device programming and test. RST 94 B5 I Reset input NMI Nonmaskable interrupt input port P6.0 95 A4 I/O General-purpose digital I/O A0 Analog input A0 for 12-bit ADC OA0I0 OA0 input multiplexer on + terminal and – terminal P6.1 96 D5 I/O General-purpose digital I/O A1 Analog input A1 for 12-bit ADC OA0O OA0 output P6.2 97 B4 I/O General-purpose digital I/O A2 Analog input A2 for 12-bit ADC OA0I1 OA0 input multiplexer on + terminal and – terminal |
类似零件编号 - MSP430FG4619_V01 |
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类似说明 - MSP430FG4619_V01 |
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