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74AVC16646DGGRE4 数据表(PDF) 1 Page - Texas Instruments |
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74AVC16646DGGRE4 数据表(HTML) 1 Page - Texas Instruments |
1 / 18 page www.ti.com FEATURES DESCRIPTION 136 -128 -144 -160 0.4 0.8 1.2 1.6 2.0 2.4 2.8 170 153 119 102 85 68 51 34 17 0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 TA = 25°C Process = Nominal IOL - Output Current - mA VCC = 3.3 V VCC = 2.5 V VCC = 1.8 V TA = 25°C Process = Nominal IOH - Output Current - mA VCC = 3.3 V VCC = 2.5 V VCC = 1.8 V -80 -96 -112 -32 -48 -64 0 -16 SN74AVC16646 16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS SCES181F – DECEMBER 1998 – REVISED JUNE 2005 • Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications • Member of the Texas Instruments Widebus™ Family • Ioff Supports Partial-Power-Down Mode Operation • EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II • DOC™ (Dynamic Output Control) Circuit Dynamically Changes Output Impedance, • Package Options Include Plastic Thin Shrink Resulting in Noise Reduction Without Speed Small-Outline (DGG) and Thin Very Degradation Small-Outline (DGV) Packages • Dynamic Drive Capability Is Equivalent to Standard Outputs With IOH and IOL of ±24 mA at 2.5-V VCC A Dynamic Output Control (DOC™) circuit is implemented, which, during the transition, initially lowers the output impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows typical VOL vs IOL and VOH vs IOH curves to illustrate the output impedance and drive capability of the circuit. At the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a high-drive standard-output device. For more information, refer to the TI application reports, AVC Logic Family Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOC™) Circuitry Technology and Applications, literature number SCEA009. Figure 1. Output Voltage vs Output Current This 16-bit bus transceiver and register is operational at 1.2-V to 3.6-V VCC, but is designed specifically for 1.65-V to 3.6-V VCC operation. The SN74AVC16646 can be used as two 8-bit transceivers or one 16-bit transceiver. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 2 illustrates the four fundamental bus-management functions that can be performed with the SN74AVC16646. Output-enable (OE) and direction-control (DIR) inputs are provided to control the transceiver functions. In the transceiver mode, data present at the high-impedance port may be stored in either register or in both. The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus, EPIC, DOC are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright © 1998–2005, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
类似零件编号 - 74AVC16646DGGRE4 |
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类似说明 - 74AVC16646DGGRE4 |
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