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82845G 数据表(PDF) 45 Page - Intel Corporation |
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82845G 数据表(HTML) 45 Page - Intel Corporation |
45 / 193 page Intel® 82845G/82845GL/82845GV GMCH Datasheet 45 Register Description have a Bus Number that matches the Secondary Bus Number of the GMCH’s “virtual” Host-to- PCI_B/AGP bridge will be translated into Type 0 configuration cycles on the PCI_B/AGP interface. The GMCH will decode the Device Number field [15:11] and assert the appropriate GAD signal as an IDSEL in accordance with the PCI-to-PCI Bridge Type 0 configuration mechanism. The remaining address bits will be mapped as described in Figure 3-2. NOTE: If the Bus Number is non-zero, greater than the value programmed into the Secondary Bus Number register, and less than or equal to the value programmed into the Subordinate Bus Number register the configuration cycle is targeting a PCI bus downstream of the targeted interface. The GMCH will generate a Type 1 PCI configuration cycle on PCI_B/AGP. The address bits will be mapped as described in Figure 3-3. Figure 3-2. Configuration Mechanism Type 0 Configuration Address to PCI Address Mapping x x Register Number Function No. Device Number Bus Number Reserved 1 CONFIG_ADDRESS AGP/PCI_B Type 0 Configuration Cycle 31 0 24 23 16 15 11 10 8 7 2 1 0 0 Register Number Function No. Reserved = 0 IDSEL 31 0 24 23 16 15 11 10 8 7 2 1 14 AGP GAD[31:0] Address Config Address AD[15:11] AGP GAD[31:16] IDSEL Config Address AD[15:11] AGP GAD[31:16] IDSEL 00000 0000 0000 0000 0001 01000 0000 0001 0000 0000 00001 0000 0000 0000 0010 01001 0000 0010 0000 0000 00010 0000 0000 0000 0100 01010 0000 0100 0000 0000 00011 0000 0000 0000 1000 01011 0000 1000 0000 0000 00100 0000 0000 0001 0000 01100 0001 0000 0000 0000 00101 0000 0000 0010 0000 01101 0010 0000 0000 0000 00110 0000 0000 0100 0000 01110 0100 0000 0000 0000 00111 0000 0000 1000 0000 01111 1000 0000 0000 0000 1xxxx 0000 0000 0000 0000 |
类似零件编号 - 82845G |
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类似说明 - 82845G |
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