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SAA32M4 数据表(PDF) 1 Page - List of Unclassifed Manufacturers

部件名 SAA32M4
功能描述  DOUBLE DATA RATE (DDR) SDRAM
Download  13 Pages
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制造商  ETC1 [List of Unclassifed Manufacturers]
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标志 ETC1 - List of Unclassifed Manufacturers

SAA32M4 数据表(HTML) 1 Page - List of Unclassifed Manufacturers

  SAA32M4 Datasheet HTML 1Page - List of Unclassifed Manufacturers SAA32M4 Datasheet HTML 2Page - List of Unclassifed Manufacturers SAA32M4 Datasheet HTML 3Page - List of Unclassifed Manufacturers SAA32M4 Datasheet HTML 4Page - List of Unclassifed Manufacturers SAA32M4 Datasheet HTML 5Page - List of Unclassifed Manufacturers SAA32M4 Datasheet HTML 6Page - List of Unclassifed Manufacturers SAA32M4 Datasheet HTML 7Page - List of Unclassifed Manufacturers SAA32M4 Datasheet HTML 8Page - List of Unclassifed Manufacturers SAA32M4 Datasheet HTML 9Page - List of Unclassifed Manufacturers Next Button
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128Mb: x4, x8, x16
DDR SDRAM
PDF: 09005aef80505d1b / Source: 09005aef80469e44
128Mb: x4, x8, x16 DDR SDRAM
Rev: 11/23/2004
1
www.spectek.com
SpecTek reserves the right to change products or specifications
without notice.
© 2001, 2002, 2004 SpecTek
DOUBLE DATA RATE
(DDR) SDRAM
• PC1600 and PC2100 compatible
• VDD = +2.5V ±0.2V, VDDQ = +2.5V ±0.2V
• Bi-directional data strobe (DQS) transmitted/ received with
data, i.e., source-synchronous data capture (x16 has two –
one per byte)
• Internal, pipelined double-data-rate (DDR) architecture;
two data accesses per clock cycle
• Differential clock inputs (CK and CK#)
• Commands entered on each positive CK edge
• DQS edge-aligned with data for READs; center-aligned
with data for WRITEs
• DLL to align DQ and DQS transitions with CK
• Four internal banks for concurrent operation
• Data mask (DM) for masking write data (x16 has two –
one per byte)
• Programmable burst lengths: 2, 4, or 8
• Auto precharge option
• Auto Refresh
• Longer lead TSOP for improved reliability (OCPL)
• 2.5V I/O (SSTL_2 compatible)
Options:
Designation:
Family
SpecTek Memory
SAA
Configuration
32 Meg x 4 (8 Meg x 4 x 4 banks)
32M4
16 Meg x 8 (4 Meg x 8 x 4 banks)
16M8
8 Meg x 16 (2 Meg x 16 x 4 banks)
8M16
Design ID
DDR 128 Megabit Design
Yx6x
(Call SpecTek Sales for details on
availability of “x” placeholders)
Voltage and refresh
2.5V, Auto Refresh
V4
2.5V, Self or Auto Refresh
R4
Plastic Package – OCPL
66-pin TSOP
TL
(400 mil width, 0.65mm pin pitch)
Timing – Cycle Time
7.5ns @ CL = 2.5 (PC2100)
-75A
10ns @ CL = 2.5 (PC1600)
-8A
Part number example:
SAA16M8T95AV4TL-75A
(For part numbers prior to December
2004, refer to page 13 for decoding.)


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