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MC1496BDR2 数据表(PDF) 5 Page - ON Semiconductor

部件名 MC1496BDR2
功能描述  BALANCED MODULATORS/DEMODULATORS
Download  14 Pages
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制造商  ONSEMI [ON Semiconductor]
网页  http://www.onsemi.com
标志 ONSEMI - ON Semiconductor

MC1496BDR2 数据表(HTML) 5 Page - ON Semiconductor

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MC1496, MC1496B
http://onsemi.com
5
Bias currents flowing into Pins 1, 4, 8 and 10 are transistor
base currents and can normally be neglected if external bias
dividers are designed to carry 1.0 mA or more.
Transadmittance Bandwidth
Carrier transadmittance bandwidth is the 3.0 dB bandwidth
of the device forward transadmittance as defined by:
g21C+
io (each sideband)
vs (signal)
V
o + 0
Signal transadmittance bandwidth is the 3.0 dB bandwidth
of the device forward transadmittance as defined by:
g21S+
io (signal)
vs (signal)
Vc + 0.5 Vdc, Vo + 0
Coupling and Bypass Capacitors
Capacitors C1 and C2 (Figure 5) should be selected for a
reactance of less than 5.0
W at the carrier frequency.
Output Signal
The output signal is taken from Pins 6 and 12 either
balanced or single−ended. Figure 11 shows the output levels
of each of the two output sidebands resulting from variations
in both the carrier and modulating signal inputs with a
single−ended output connection.
Negative Supply
VEE should be dc only. The insertion of an RF choke in
series with VEE can enhance the stability of the internal
current sources.
Signal Port Stability
Under certain values of driving source impedance,
oscillation may occur. In this event, an RC suppression
network should be connected directly to each input using
short leads. This will reduce the Q of the source−tuned
circuits that cause the oscillation.
Signal Input
(Pins 1 and 4)
510
10 pF
An alternate method for low−frequency applications is to
insert a 1.0 k
W resistor in series with the input (Pins 1, 4). In
this case input current drift may cause serious degradation
of carrier suppression.
NOTE:
Shielding of input and output leads may be needed
to properly perform these tests.
Figure 5. Carrier Rejection and Suppression
Figure 6. Input−Output Impedance
Figure 7. Bias and Offset Currents
Figure 8. Transconductance Bandwidth
0.01
mF
2.0 k
−8.0 Vdc
I6
I9
1.0 k
I7
I8
6.8 k
Zout
+Vo
+
+Vo
I9
3
RL
3.9 k
VCC
12 Vdc
8
C1
0.1
mF
MC1496
1.0 k
2
Re
1.0 k
C2
0.1
mF
51
10 k
Modulating
Signal Input
Carrier
Input
VC
Carrier Null
51
51
10 k
50 k
R1
VS
−Vo
RL
3.9 k
I6
I4
6
14
5
12
2
Re = 1.0 k
3
Zin
0.5 V
8
10
I1
4
1
−Vo
10
1
6
4
14
5
12
6.8 k
V
I10
I5
−8.0 Vdc
VEE
1.0 k
MC1496
MC1496
MC1496
6
14
5
12
I10
6.8 k
−8.0 Vdc
VEE
VCC
12 Vdc
2
Re = 1.0 k
3
1.0 k
Modulating
Signal Input
Carrier
Input
VC
VS
0.1
mF
0.1
mF
1.0 k
51
1.0 k
14
5
6
12
1.0 k
23
Re
VCC
12 Vdc
2.0 k
+Vo
−Vo
6.8 k
10 k
Carrier Null
51
10 k
50 k
V
−8.0 Vdc
VEE
50 50
8
10
4
1
8
10
4
1
51
TEST CIRCUITS


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