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UPD4564841 数据表(PDF) 29 Page - Elpida Memory

部件名 UPD4564841
功能描述  64M-bit Synchronous DRAM 4-bank, LVTTL
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制造商  ELPIDA [Elpida Memory]
网页  http://www.elpida.com/en
标志 ELPIDA - Elpida Memory

UPD4564841 数据表(HTML) 29 Page - Elpida Memory

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Data Sheet E0149N10
29
µµµµPD4564441, 4564841, 4564163
11.3 Write to Read Command Interval
Write command and Read command interval is also 1 cycle.
Only the write data before Read command will be written.
The data bus must be Hi-Z at least one cycle prior to the first DOUT.
QB1
QB2
QB3
QB4
Write A
Hi-Z
QB1
QB2
QB3
QB4
Write A
Hi-Z
DQ
Command
DQ
Command
/CAS latency = 2
/CAS latency = 3
CLK
T0
T2
T1
T3
T4
T5
T6
T7
T8
Burst length = 4
DA1
DA1
Read B
Read B


类似零件编号 - UPD4564841

制造商部件名数据表功能描述
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类似说明 - UPD4564841

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NEC		 UPD4564323 NEC-UPD4564323 Datasheet
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